Cache memory usable as scratch pad storage

• US 7,260,682 B2
• Filed: 07/25/2005
• Issued: 08/21/2007
• Est. Priority Date: 07/27/2004
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Cabillic, Gilbert, Chauvel, Gerard, Lesot, Jean-Philippe
• Primary Examiner(s): Thai; Tuan V.
• Application Number:
  US11/188,668
• Publication Number:
  US 20060026354A1
• Time in Patent Office: 757 Days
• Field of Search: 711/100, 711/118, 711/154, 711/170
• US Class Current: 711/118
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 12/1081 for peripheral access to main memory, e.g. direct memory access [DMA]
• CPC Class Codes: G06F 2212/6012 of operating mode, e.g. cache mode or local memory mode
• CPC Class Codes: G06F 9/30174 for non-native instruction set, e.g. Javabyte, legacy code
• CPC Class Codes: G06F 9/45504 Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A processor adapted to couple to external memory. The processor comprises a controller and data storage. The data storage is usable to store local variables and temporary data and is configurable to operate in either a cache policy mode in which a miss results in an access of the external memory or in a scratch pad policy mode in which a miss does not result in an access of the external memory. The data storage comprises first and second portions, and wherein only one of said portions is active at a time for storing said local variables. When the active portion does not have sufficient capacity for additional local variables, the other portion becomes the active portion for storing local variables. When one portion is the active portion, the other portion is used to store the temporary data and such other portion is sufficiently large to contain the temporary data.

Claims

1. A processor adapted to couple to external memory, comprising:

a controller;

data storage operated by said controller, said data storage usable to store local variables and temporary data and said data storage configurable to operate in either a cache policy mode in which a miss results in an access of the external memory or in a scratch pad policy mode in which a miss does not result in an access of the external memory;

wherein said data storage comprises a first portion and a second portion, and wherein only one of said portions is active at a time for storing said local variables, the non-active portion being unusable for storing the local variables;

wherein, when the active portion does not have sufficient capacity for additional local variables to be stored therein, the other portion becomes the active portion for storing local variables; and

wherein, when one portion is the active portion, the other portion is used to store the temporary data, such other portion being sufficiently large to contain all desired such temporary data.

2. The processor of claim 1 wherein such other portion is first cleaned to the external memory to be able to use the other portion for such temporary data.

3. The processor of claim 1 wherein, when the other portion is to be used to store temporary data, a new page of external memory is also allocated to said data storage.

4. The processor of claim 1 wherein, when the other portion is to be used to store temporary data, the mode of the data storage changing from the cache policy mode to the scratch pad policy mode to enable the other potion to be used to store the temporary data.

5. The processor of claim 4 wherein such other portion ceases to be used to store temporary data, the mode of the data storage switches back to the cache policy mode.

6. A system, comprising:

a communications transceiver;

a first memory;

a controller communicatively coupled to said communications transceiver and said memory; and

a second memory operated by said controller, said second memory usable to store local variables and temporary data and said second memory configurable to operate in either a cache policy mode in which a miss results in an access of the first memory or in a scratch pad policy mode in which a miss does not result in an access of the first memory;

wherein said second memory comprises a first portion and a second portion, and wherein only one of said portions is active at a time for storing the local variables, the non-active portion being unusable for storing the local variables;

wherein, when the active portion does not have sufficient capacity for additional local variables to be stored therein, the other portion becomes the active portion for storing local variables; and

wherein, when one portion is the active portion, the other portion is used to store the temporary data, such other portion being sufficiently large to contain all desired such temporary data.

7. The system of claim 6 wherein such other portion is first cleaned to the external memory to be able to use the other portion for such temporary data.

8. The system of claim 6 wherein, when the other portion is to be used to store temporary data, a new page of external memory is also allocated to said data storage.

9. The system of claim 6 wherein, when the other portion is to be used to store temporary data, the mode of the data storage changing from the cache policy mode to the scratch pad policy mode to enable the other potion to be used to store the temporary data.

10. The system of claim 9 wherein when such other portion ceases to be used to store temporary data, the mode of the data storage switches back to the cache policy mode.

11. The system of claim 6 wherein the system comprises a portable communication device.

12. A method, comprising:

using only a first portion of a cache memory data array to store local variables until said first portion has insufficient capacity for storing additional local variables, said cache memory data array comprising the first portion and a second portion;

once the first portion has insufficient capacity for storing additional local variables, using only the second portion of the cache memory data to store said additional local variables and not using the first portion;

when the second portion has insufficient capacity for storing additional local variables, copying the local variables from only the first portion to external memory; and

using one of the first or second portions to store temporary data, wherein the first or second portion so used to store the temporary data being sufficiently large to contain all desired such temporary data.

13. The method of claim 12 further comprising first clearing the first or second portion used to store the temporary data to the external memory to use such portion for the temporary data.

14. The method of claim 12 further comprising, when the first or second portion is to be used to store the temporary data, allocating a new page of external memory to said cache memory data array.

15. The method of claim 12 further comprising changing the mode of the cache memory data array from a cache policy mode in which in which a miss results in an access of the external memory to a scratch pad policy mode in which a miss does not result in an access of the external memory, thereby enabling said first or second potion to be used to store the temporary data.

16. The method of claim 15 wherein when the first or second portion ceases to be used to store temporary data, the mode of the cache memory data array switches back to the cache policy mode.