System and method of driving an array of optical elements
First Claim
Patent Images
1. A display element having internal optical output control circuitry, comprising:
- at least one optical element integrated within a display element configured for displaying multiple optical states;
an input configured for receiving an array position addressing signal containing array position clocking and data which are delivered in common to all said display elements within a single or multidimensional display array;
a counter configured for maintaining an array position count in response to detecting said array position clocking from said input;
a memory configured for retaining an array position;
a comparison circuit configured for generating a data load signal in response to detecting a desired relationship between said array position maintained by said counter and said array position retained in said memory;
a latch circuit configured for loading data from said input in response to receipt of said data load signal; and
a driver circuit configured for outputting said data to update the optical state of said at least one optical element.
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Accused Products
Abstract
A system and/or method for controlling a display array without the use of row and column drivers. The display elements within the system are configured to maintain an active address signal in response to a received signal containing serially encoded display settings. Each display element is loaded with an address of where it is located within the array. The display elements then extract the display information from the signal upon matching the address, wherein they output the correct display setting for their position within the array. An optical programming method is described for setting the address of the display elements in-situ.
69 Citations
72 Claims
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1. A display element having internal optical output control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; an input configured for receiving an array position addressing signal containing array position clocking and data which are delivered in common to all said display elements within a single or multidimensional display array; a counter configured for maintaining an array position count in response to detecting said array position clocking from said input; a memory configured for retaining an array position; a comparison circuit configured for generating a data load signal in response to detecting a desired relationship between said array position maintained by said counter and said array position retained in said memory; a latch circuit configured for loading data from said input in response to receipt of said data load signal; and a driver circuit configured for outputting said data to update the optical state of said at least one optical element. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A display element having internal control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; a memory configured for programming to a first address associated with the position of said display element within an array of said display elements; means for extracting output data from a data signal, received in parallel by the display element and other display elements within an array of display elements, in response to matching a second address received on said data signal with said first address; and means for modulating the output of said at least one optical element in response to said extracted output data. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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40. A display element having internal control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; a memory configured for storing a first address for the display element; means for extracting output control data from a data signal, received in parallel with other display elements within an array of the display elements, in response to matching a second address received from the data signal with said first address; and means for modulating the output state of at least one said optical element in response to said extracted output control data. - View Dependent Claims (41, 42, 43, 44, 45, 46, 47, 48, 49, 50)
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51. A display element having internal control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; a memory configured for storing a first address for the display element in response to the position of the display element containing said at least one optical element within an array of said display elements; means for extracting output control data from a common data signal received in parallel with other display elements within an array of the data elements, said output control data being extracted in response to detecting a desired relationship between said first address stored in memory and a second address received over said common data signal; and means for modulating the output of at least one said optical element in response to said extracted output control data. - View Dependent Claims (52, 53, 54)
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55. A display element having internal control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; a memory configured for storing a first address, for representing the position of the display element within an array of display elements, in response to programming of said memory wherein it retains the same said first address during operation of said display element; means for receiving a data signal in common by all display elements in an array of the display elements; means for matching a second address received from the data signal with said first address representing display element position within an array of the display elements; means for outputting optical state data, from said data signal for this display element position within an array of display elements, in response to said matching to said at least one optical element in said display element. - View Dependent Claims (56, 57, 58, 59, 60, 61)
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62. A display element having internal control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; a memory configured for storing a first address for the display element; means for programming said memory to said first address in response to the position of the display element within an array of the display elements; an optical detector within said display element, said optical detector configured for receiving said programming signal; means for extracting output control data from a data signal, received in parallel with other display elements within an array of the display elements, in response to matching a second address received from the data signal with said first address; wherein said programming means is configured for loading said second address from the data signal in response to a programming signal received by said display element and not by other display elements within a same array of display elements which are not responsive to said second address; and means for modulating the output state of at least one said optical element in response to said extracted output control data. - View Dependent Claims (63, 64, 65)
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66. A display element having internal control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; a memory configured for programming to a first address associated with the position of said display element within an array of said display elements; wherein said memory is configured to retain said first address during operation until reprogrammed to a different address; means for programming said first address in response to optical signals coupled between said at least one optical element of the display element and an optical element contained within an external programming array configured for performing optical programming; means for extracting output data from a data signal, received in parallel by the display element and other display elements within an array of display elements, in response to a match occurring between a second address received on said data signal to said first address; and means for modulating the output of said at least one optical element in response to said extracted output data; wherein said at least one optical element in said display element is controllably addressed within an array of the display elements that operates without the need of coupling row and column signal lines to the display elements.
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67. A display element having internal control circuitry, comprising:
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at least one optical element integrated within a display element configured for displaying multiple optical states; a memory configured for storing a first address for the display element; means for programming said first address in response to optical signals coupled between said at least one optical element of the display element and an optical element contained within an external programming array configured for performing optical programming; means for extracting output control data from a data signal, received in parallel with other display elements within an array of the display elements, in response to matching a second address received from the data signal with said first address; and means for modulating the output state of at least one said optical element in response to said extracted output control data.
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68. A display element having internal control circuitry, comprising:
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an integrated circuit; at least one optical element within a package of said integrated circuit, or attached to said integrated circuit and configured for displaying multiple optical states; means for receiving power and a data signal received in parallel by said optical display unit and other optical display units within an array of optical display units; a memory configured for programming to a first address for retaining a position value for said display element within an array of other display elements, said memory retained during operation until reprogrammed to a different address; means for programming said first address in response to signals communicated to said display element and said other display elements within an array of said display elements for establishing said first address responsive to the position of said display element within the array of other display elements; wherein said signals communicated by said means for programming are communicated responsive to array position of said display element within the array of display elements; means for extracting output data from said data signal in response to a match occurring between a second address determined in response to said data signal and said first address; and means for modulating the output of said at least one optical element of said display element in response to said extracted output data. - View Dependent Claims (69, 70)
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71. A display element having internal control circuitry, comprising:
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at least one optical element integrated within each said display element; said display element configured for driving said at least one optical element as pixels within a display array having a plurality of pixels driven by an array of said display elements; said optical element configured for displaying multiple optical states; said display element configured for electrical connection to a base member having parallel conductors through which power as well as a data signal are communicating to each display element within a plurality of the display elements within a display array; a control circuit integrated within said display element, said control circuit configured for modulating the state of said at least one optical element in response to extracting data from a serial data signal carried in parallel to said plurality of display elements; a memory within said control circuit for retaining an array position address of the display element, within an array of display elements, which is programmed into said memory and to which this particular display element is to be responsive; said array position address being retained during operation and power down of said display element until said display element is programmed to a different position in an array of the display elements; and a comparison circuit within said control circuit, said comparison circuit configured for receiving the serial data signal on the parallel conductors and detecting an array position address match with said array position address retained in said memory; said control circuit configured for extracting optical state data from said serial data signal in response to said array position address match and driving the output of said at least one optical element to said optical state; and wherein said control circuit allows each said display element to be controllably addressed over the parallel conductors without the need of individual row and column signal lines. - View Dependent Claims (72)
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Specification