Low basal plane dislocation bulk grown SiC wafers
DCFirst Claim
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1. A high quality single crystal wafer of SiC having a diameter of at least about 3 inches and at least one continuous square inch of surface area that has a basal plane dislocation density less than about 500 cm−
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Abstract
A high quality single crystal wafer of SiC is disclosed. The wafer has a diameter of at least about 3 inches (75 mm) and at least one continuous square inch (6.25 cm2) of surface area that has a basal plane dislocation volume density of less than about 500 cm−2 for a 4 degree off-axis wafer.
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15 Claims
- 1. A high quality single crystal wafer of SiC having a diameter of at least about 3 inches and at least one continuous square inch of surface area that has a basal plane dislocation density less than about 500 cm−
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5. A high quality semiconductor wafer comprising:
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a silicon carbide wafer having a diameter of at least about 3 inches; said wafer having the 4H polytype; and said wafer having at least one continuous square inch of surface area that has a basal plane dislocation density on its surface of between about 50 and about 500 cm−
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6. A high quality semiconductor wafer comprising:
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a silicon carbide wafer having a diameter of at least about 3 inches; and said wafer having at least one continuous square inch of surface area having between about 2,000 and 20,000 basal plane dislocations.
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7. A high quality semiconductor wafer comprising:
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a silicon carbide wafer having a diameter of at least about 3 inches; said wafer having at least one continuous square inch of surface area having a basal plane dislocation density of less than about 500 cm−
2; anda Group III-nitride epitaxial layer on said surface of said silicon carbide wafer. - View Dependent Claims (8)
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9. A plurality of semiconductor device precursors comprising:
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a silicon carbide wafer having a diameter of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density of less than about 500 cm−
2; anda plurality of respective Group III-nitride epitaxial layers on some portions of said wafer.
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10. A semiconductor wafer comprising:
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a bulk single crystal silicon carbide substrate of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density of less than about 500 cm−
2, said bulk single crystal having respective first and second surfaces opposite one another; anda plurality of devices on said silicon carbide substrate, each said device comprising; an epitaxial layer located on the substrate, said layer having a concentration of suitable dopant atoms for making the epitaxial layer a first conductivity type, and respective source, channel, and drain portions; a metal oxide layer on said channel portion; and and a metal gate contact on said metal oxide layer for forming an active channel when a bias is applied to said metal gate contact.
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11. A semiconductor wafer comprising:
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a bulk single crystal silicon carbide substrate of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density of less than 500 cm−
2, said bulk single crystal having respective first and second surfaces opposite one another; anda plurality of devices on said silicon carbide substrate, each said device comprising; a conductive channel on said substrate; a source and a drain on said conductive channel; and a metal gate contact between said source and said drain on said conductive channel for forming an active channel when a bias is applied to the metal gate contact.
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12. A semiconductor wafer comprising:
a bulk single crystal silicon carbide substrate of at least about 3 inches and having at least one continuous square inch of surface area with a basal plane dislocation density less than 500 cm−
2, said bulk single crystal having respective first and second surfaces opposite one another.- View Dependent Claims (13, 14, 15)
Specification