Configurable IC with interconnect circuits that also perform storage operations

• US 7,342,415 B2
• Filed: 03/15/2005
• Issued: 03/11/2008
• Est. Priority Date: 11/08/2004
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Redgrave, Jason, Chandra, Vikas, Schmit, Herman, Teig, Steven
• Primary Examiner(s): TRAN, ANH Q
• Application Number:
  US11/081,859
• Publication Number:
  US 20070241782A1
• Time in Patent Office: 1,092 Days
• Field of Search: 326 38- 41, 326/113
• US Class Current: 326/41
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/1776 for memories

Abstract

Some embodiments provide a configurable IC that includes several configurable logic circuits for configurably performing computations. The configurable IC also includes several configurable routing circuits for configurable routing signals to and from the logic circuits. In some embodiments, at least a set of the routing circuits are routing/storage circuits. Each routing/storage circuit has an output and a storage section at the output for controllably storing a signal that the routing/storage circuit produces at the output.

Claims

1. An integrated circuit (IC) comprising:

a) a plurality of configurable logic circuits for configurably performing computations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) wherein at least a set of the interconnect circuits are interconnect/storage circuits, wherein each interconnect/storage circuit comprises (i) a multi-stage multiplexer that has an output stage, and (ii) a storage section at the output stage for controllably storing a signal that the interconnect/storage circuit produces at the output stage.

2. The IC of claim 1, wherein the storage section of each interconnect/storage circuit is established in the multi-stage multiplexer of the interconnect/storage.

3. The IC of claim 2, wherein the storage section of the interconnect/storage circuit is not in front of the multi-stage multiplexer.

4. The IC of claim 1, wherein the multi-stage multiplexer uses the output stage even when the interconnect/storage circuit does not store a signal.

5. The IC of claim 4, wherein the storage section of an interconnect/storage circuit is built in the output stage of the multi-stage multiplexer.

6. The IC of claim 4, wherein the storage section of an interconnect/storage circuit is cross-coupled to the output stage of the multi-stage multiplexer.

7. The IC of claim 1, wherein the storage section is established by selectively establishing a feedback path in the output stage.

8. The IC of claim 7, wherein the feedback path is established by cross coupling two signals in the output stage.

9. The IC of claim 8, wherein the two signals are a complementary pair of signals.

21. The IC of claim 1, wherein at least one interconnect/storage circuit reconfigures at run time to act either as a storage circuit or as an interconnect circuit.

22. The IC of claim 1, wherein the storage section of an interconnect/storage circuit is not in signal path flow and does not cause signal path delays when the interconnect/storage circuit is not storing a signal in the storage section.

23. The IC of claim 1, wherein the output of the interconnect/storage circuit is fed back to a particular input of the interconnect/storage circuit.

24. The IC of claim 23, wherein the interconnect/storage circuit comprises a set of inputs and a set of select lines to select one of its inputs for output, wherein the interconnect/storage circuit acts as storage when the select lines select the particular input that receives the fed back output, wherein the interconnect/storage circuit does not act as storage when the select lines do not select the particular input that receives the fed back output.

25. The IC of claim 1, wherein the interconnect circuits are routing circuits.

10. An electronic device comprising:

an integrated circuit (IC) comprising;

a plurality of configurable logic circuits for configurably performing computations; and

a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

wherein at least a set of the interconnect circuits are interconnect/storage circuits, wherein each interconnect/storage circuit comprises (i) a multi-stage multiplexer that has an output stage, and (ii) a storage section at the output stage for controllably storing a signal that the interconnect/storage circuit produces at the output stage.

11. The electronic device of claim 10, wherein the storage section of each interconnect/storage circuit is established in the multi-stage multiplexer of the interconnect/storage.

12. The electronic device of claim 11, wherein the storage section of the interconnect/storage circuit is not in front of the multi-stage multiplexer.

13. The electronic device of claim 10, wherein the multi-stage multiplexer uses the output stage even when the interconnect/storage circuit does not store a signal.

14. The electronic device of claim 13, wherein the storage section of an interconnect/storage circuit is built in the output stage of the multi-stage multiplexer.

15. The electronic device of claim 13, wherein the storage section of an interconnect/storage circuit is cross-coupled to the output stage of the multi-stage multiplexer.

16. The electronic device of claim 10, wherein the storage section is established by selectively establishing a feedback path in the output stage.

17. The electronic device of claim 16, wherein the feedback path is established by cross coupling two signals in the output stage.

18. The electronic device of claim 17, wherein the two signals are a complementary pair of signals.

19. The electronic device of claim 10, wherein the output of the interconnect/storage circuit is fed back to a particular input of the interconnect/storage circuit.

20. The electronic device of claim 19, wherein the interconnect/storage circuit comprises a set of inputs and a set of select lines to select one of its inputs for output, wherein the interconnect/storage circuit acts as storage when the select lines select the particular input that receives the fed back output, wherein the interconnect/storage circuit does not act as storage when the select lines do not select the particular input that receives the fed back output.

26. An integrated circuit (IC) comprising:

a) a plurality of configurable logic circuits for configurably performing computations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) wherein at least a set of the interconnect circuits are interconnect/storage circuits comprising (i) an interconnect section that includes an output stage and (ii) a storage section for controllably storing a signal that the interconnect/storage circuit produces, wherein the storage section is cross coupled to the output stage of the interconnect section.

27. The IC of claim 26, wherein the storage section stores the signal by passing a complimentary pair of the signal through the cross coupled wires to the output stage of the interconnect/storage circuit.

28. The IC of claim 26 further comprising configuration data storage for supplying configuration data sets to the storage section, wherein the configuration data sets control whether the storage section stores the signal.

29. An integrated circuit (IC) comprising:

a) a plurality of configurable logic circuits for configurably performing computations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) wherein at least a set of the interconnect circuits are interconnect/storage circuits, wherein each interconnect/storage circuit has an output stage and a storage section at the output stage for controllably storing a signal that the interconnect/storage circuit produces at the output stage, wherein the storage section is established by selectively establishing a feedback path in the output stage, wherein the feedback path is established by cross coupling two signals in the output stage.

30. The IC of claim 29, wherein the two signals are a complimentary pair of signals.

31. An integrated circuit (IC) comprising:

a) a plurality of configurable logic circuits for configurably performing computations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) wherein at least a set of the interconnect circuits are interconnect/storage circuits, wherein each interconnect/storage circuit has an output and a storage section for controllably storing a signal that the interconnect/storage circuit produces at the output, wherein the output of the interconnect/storage circuit is fed back to a particular input of the interconnect/storage circuit.

32. The IC of claim 31, wherein the interconnect/storage circuit comprises a set of inputs and a set of select lines to select one of its inputs for output, wherein the interconnect/storage circuit acts as storage when the select lines select the particular input that receives the fed back output.

33. The IC of claim 31, wherein the interconnect/storage circuit comprises a set of inputs and a set of select lines to select one of its inputs for output, wherein the interconnect/storage circuit does not act as storage when the select lines do not select the particular input that receives the fed back output.

34. An electronic device comprising:

an integrated circuit (IC) comprising;

a) a plurality of configurable logic circuits for configurably performing computations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) wherein at least a set of the interconnect circuits are interconnect/storage circuits comprising (i) an interconnect section that includes an output stage and (ii) a storage section for controllably storing a signal that the interconnect/storage circuit produces, wherein the storage section is cross coupled to the output stage of the interconnect section.

35. An electronic device comprising:

an integrated circuit (IC) comprising;

a) a plurality of configurable logic circuits for configurably performing computations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) wherein at least a set of the interconnect circuits are interconnect/storage circuits, wherein each interconnect/storage circuit has an output stage and a storage section at the output stage for controllably storing a signal that the interconnect/storage circuit produces at the output stage by selectively establishing a feedback path in the output stage, wherein the feedback path is established by cross coupling two signals in the output stage.

36. An electronic device comprising:

an integrated circuit (IC) comprising;

a) a plurality of configurable logic circuits for configurably performing computations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) wherein at least a set of the interconnect circuits are interconnect/storage circuits, wherein each interconnect/storage circuit has an output and a storage section for controllably storing a signal that the interconnect/storage circuit produces at the output, wherein the output of the interconnect/storage circuit is fed back to a particular input of the interconnect/storage circuit.