Method for forming a trench MOSFET having self-aligned features

  • US 7,344,943 B2
  • Filed: 04/20/2005
  • Issued: 03/18/2008
  • Est. Priority Date: 05/20/2003
  • Status: Active Grant
First Claim
Patent Images

1. A method of forming a semiconductor device, comprising:

  • forming a plurality of trenches in a silicon layer;

    forming a first doped region of a first conductivity type in an upper portion of the silicon layer;

    forming an insulating layer within each trench such that a top surface of the insulating layer is substantially coplanar with a top surface of the first doped region, the insulating layer in each trench extending directly over a portion of the first doped region adjacent each trench sidewall; and

    removing exposed silicon from adjacent each trench until, of the first doped region, only the portions adjacent the trench sidewalls remain, the remaining portions of the first doped region adjacent the trench sidewalls forming source regions which are self-aligned to the trenches.

View all claims

    Thank you for your feedback