Thin film transistor having an etching protection film and manufacturing method thereof

• US 7,385,224 B2
• Filed: 09/01/2005
• Issued: 06/10/2008
• Est. Priority Date: 09/02/2004
• Status: Expired due to Fees

• Current Assignee: Casio Computer Company Limited
• Original Assignee: Casio Computer Company Limited
• Inventors: Ishii, Hiromitsu, Hokari, Hitoshi, Yoshida, Motohiko, Yamaguchi, Ikuhiro
• Primary Examiner(s): Jackson, Jerome
• Assistant Examiner(s): Ho, Anthony
• Application Number:
  US11/219,171
• Publication Number:
  US 20060043447A1
• Time in Patent Office: 1,013 Days
• Field of Search: 257/72, 257/43, 257/59
• US Class Current: 257/72
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).

Claims

1. A thin film transistor comprising:

a semiconductor thin film including a source region, a drain region, and a channel region, the semiconductor thin film comprising a peripheral edge and a peripheral portion which is adjacent to the peripheral edge;

a gate insulating film formed on a first surface of the semiconductor thin film;

a gate electrode formed to be opposite to the semiconductor thin film with the gate insulating film therebetween;

a source electrode and a drain electrode electrically connected to the semiconductor thin film; and

an insulating film which;

(i) is formed on a second surface of the semiconductor thin film, (ii) comprises a peripheral portion covering the peripheral portion of the semiconductor thin film and a peripheral edge having a same shape as the peripheral edge of the semiconductor thin film, and (iii) has contact holes through which at least a part of each of the source region and the drain region is exposed,

wherein the source electrode and the drain electrode are connected to the semiconductor thin film through the contact holes.

2. The thin film transistor according to claim 1, wherein the insulating film has a central portion corresponding to the channel region of the semiconductor thin film.

3. The thin film transistor according to claim 2, further comprising:

an ohmic contact layer formed on the source region of the semiconductor thin film which is exposed from one of the contact holes; and

an ohmic contact layer formed on the drain region.

4. The thin film transistor according to claim 3, wherein the source electrode completely covers the ohmic contact layer formed on the source region, and the drain electrode completely covers the ohmic contact layer formed on the drain region.

5. The thin film transistor according to claim 1, wherein the source region and the drain region of the semiconductor thin film each comprise a resistance-reduced surface, and the source electrode and the drain electrode are directly connected to the resistance-reduced surface of the source region and the resistance-reduced surface of the drain region, respectively.

6. The thin film transistor according to claim 1, further comprising an upper insulating film having contact holes placed at positions corresponding to the contact holes of the insulating film, wherein the upper insulating film is formed on the insulating film.

7. The thin film transistor according to claim 6, wherein a surface of said part of each of the source region and the drain region of the semiconductor thin film exposed from the contact holes is subjected to resistance reduction.

8. The thin film transistor according to claim 7, wherein the source electrode and the drain electrode are directly connected to the resistance-reduced surface of the source region and the resistance-reduced surface of the drain region, respectively.

9. The thin film transistor according to claim 6, further comprising:

ohmic contact layers connected to the semiconductor thin film through the contact holes formed on each of the upper insulating film and the insulating film.

10. The thin film transistor according to claim 9, wherein the source electrode and the drain electrode are respectively formed on the ohmic contact layers to completely cover the ohmic contact layers.

11. A thin film transistor comprising:

a semiconductor thin film including a source region, a drain region and a channel region;

a gate insulating film formed on one surface of the semiconductor thin film;

a gate electrode formed to be opposite to the semiconductor thin film with the gate insulating film therebetween;

an ohmic contact layer formed on each of the source region and the drain region of the semiconductor thin film; and

an insulating film formed on the channel region of the semiconductor thin film corresponding to the gate electrode,

wherein a width of the channel region is larger than a width of at least one of the source region and the drain region, and

wherein the ohmic contact layer is formed to cover an upper surface end portion of the insulating film, an upper surface of the semiconductor thin film, and an end surface of the semiconductor thin film in a channel direction, except for a portion of the channel region.

12. The thin film transistor according to claim 11, further comprising a source electrode and a drain electrode which completely cover the ohmic contact layer.

13. The thin film transistor according to claim 12, further comprising an overcoat film that covers the source electrode, the drain electrode, and a portion of the insulating film that is placed between the source electrode and the drain electrode.

14. A thin film transistor comprising:

a semiconductor thin film comprising a source region, a drain region and a channel region;

a gate insulating film formed on one surface of the semiconductor thin film;

a gate electrode formed to be opposite to the semiconductor thin film with the gate insulating film therebetween;

a source electrode and a drain electrode electrically connected to the semiconductor thin film; and

an insulating film formed on the channel region of the semiconductor thin film corresponding to the gate electrode,

wherein a width of the channel region is larger than a width of at least one of the source region and the drain region,

wherein the semiconductor thin film comprises an exposed resistance-reduced surface that is not covered with the insulating film, and

wherein the source electrode and the drain electrode are respectively formed to cover an upper surface end portion of the insulating film, an upper surface of the semiconductor thin film, and an end surface of the semiconductor thin film in a channel direction, except for a portion of the channel region.

15. The thin film transistor according to claim 14, wherein the source electrode and the drain electrode are directly connected to the resistance-reduced surface of the semiconductor thin film.

16. The thin film transistor according to claim 14, further comprising an overcoat film that covers the source electrode, the drain electrode, and a portion of the insulating film that is placed between the source electrode and the drain electrode.