Apparatus and methods for the inspection of objects

• US 7,388,978 B2
• Filed: 11/12/2003
• Issued: 06/17/2008
• Est. Priority Date: 08/05/1999
• Status: Expired due to Fees

• Current Assignee: Orbotech Limited (KLA Corporation)
• Original Assignee: Orbotech Limited (KLA Corporation)
• Inventors: Klingbell, Eyal, Gilat-Bernshtein, Tally, Duvdevani, Sharon, Mayo, Meir, Rippa, Shmuel, Smilansky, Zeev
• Primary Examiner(s): Carter; Aaron W
• Application Number:
  US10/706,489
• Publication Number:
  US 20040120571A1
• Time in Patent Office: 1,679 Days
• Field of Search: 382/141, 382144-151, 382/199, 382/209, 382/217, 382/218, 382/242, 382/263, 382/266
• US Class Current: 382/145
• CPC Class Codes: G06F 18/40 Software arrangements specially adapted for pattern recognition, e.g. user interfaces or toolboxes therefor
• CPC Class Codes: G06T 2207/30141 Printed circuit board [PCB]
• CPC Class Codes: G06T 7/001 using an image reference approach
• CPC Class Codes: G06V 10/469 Contour-based spatial representations, e.g. vector-coding
• CPC Class Codes: G06V 10/752 Contour matching
• CPC Class Codes: G06V 10/94 Hardware or software architectures specially adapted for image or video understanding

Abstract

An electrical circuit inspection method including, for each of a plurality of types of local characteristics, each type occurring at least once within electrical circuitry to be inspected, identifying at least one portion of interest within the electrical circuitry whereat the local characteristic is expected to occur, and inspecting an image of each portion of interest, using an inspection task selected in response to the type of local characteristic expected to occur in the portion of interest.

Claims

1. An electrical circuitry inspection method comprising:

performing reference based inspection of electrical circuitry to be inspected, including;

for each of a plurality of types of local characteristics, each type occurring at least once within said electrical circuitry to be inspected, identifying at least one portion of interest within the electrical circuitry whereat said local characteristic is expected to occur; and

inspecting an image of each of said at least one portion of interest, using a selected inspection task employing information defining said portion of interest and additional inspection information relevant to said portion of interest, said inspection task being selected from among a plurality of different inspection tasks in response to the type of local characteristic expected to occur in the portion of interest,

said information defining said portion of interest comprising at least one of;

binary Contour Element (CEL) data, identifying contour elements which correspond to borders between different regions in a pattern; and

color CEL data, identifying contour elements which correspond to borders between different regions in a pattern and identifying a type of region on either side of a CEL.

3. A method according to claim 1, wherein said information defining said portion of interest further comprises:

morphological feature inspection triggers; and

color defect inspection triggers.

4. A method according to claim 1 and wherein said information defining said portion of interest comprises said binary CEL data.

5. A method according to claim 4 and wherein said binary CEL data is calculated as a function of a zero crossing point of Difference of Gaussians (DoGs).

6. A method according to claim 4 and wherein said binary CEL data is calculated for pattern edges in the Red band of an RGB image.

7. A method according to claim 1 and wherein said information defining said portion of interest comprises said color CEL data.

8. A method according to claim 7 and wherein said color CEL data includes representations of at least one of:

x coordinate of a CEL, orientation of a CEL, direction of a CEL, a first endpoint location of a CEL along a pixel edge and a last endpoint location of a CEL along a pixel edge.

9. A method according to claim 7 and wherein said color CEL data includes representations of a color junction.

10. A method according to claim 1 and wherein said information defining said portion of interest comprises said morphological feature inspection triggers.

11. A method according to claim 1 and wherein said information defining said portion of interest comprises said color defect inspection triggers.

12. A method according to claim 1 and wherein said inspecting an image of each of said at least one portion of interest comprises:

designing a rule scenario including inspecting said electrical circuitry with reference to a set of general design rules;

learning a rule scenario including;

learning the contents and structure of the design of said electrical circuitry; and

generating a reference representation of said electrical circuitry having known desired attributes for use during the inspection of said electrical circuitry; and

inspecting a rule scenario including inspecting electrical circuitry to determine defects with reference to said reference representation.

2. Electrical circuitry apparatus comprising:

a reference based inspector performing reference based inspection of electrical circuitry to be inspected, said reference based inspector including;

a portion of interest identifier operative, for each of a plurality of types of local characteristics, each type occurring at least once within said electrical circuitry to be inspected, to identify at least one portion of interest within the electrical circuitry whereat said local characteristic is expected to occur; and

an image inspector inspecting an image of each of said at least one portion of interest, using a selected inspection task employing information defining said portion of interest and additional inspection information relevant to said portion of interest, said inspection task being selected from among a plurality of different inspection tasks in response to the type of local characteristic expected to occur in the portion of interest,

said information defining said portion of interest comprising at least one of;

binary Contour Element (CEL) data, identifying contour elements which correspond to borders between different regions in a patter; and

color CEL data, identifying contour elements which correspond to borders between different regions in a pattern and identifying a type of region on either side of a CEL.

13. Apparatus according to claim 2, wherein said information defining said portion of interest further comprises:

morphological feature inspection triggers; and

color defect inspection triggers.

14. Apparatus according to claim 2 and wherein said information defining said portion of interest comprises said binary CEL data.

15. Apparatus according to claim 14 and wherein said binary CEL data is calculated as a function of a zero crossing point of Difference of Gaussians (DoGs).

16. Apparatus according to claim 14 and wherein said binary CEL data is calculated for pattern edges in the Red band of an RGB image.

17. Apparatus according to claim 2 and wherein said information defining said portion of interest comprises said color CEL data.

18. Apparatus according to claim 17 and wherein said color CEL data includes representations of at least one of:

x coordinate of a CEL, orientation of a CEL and direction of a CEL, endpoint location of a CEL along a pixel edge.

19. Apparatus according to claim 17 and wherein said color CEL data includes representations of a color junction.

20. Apparatus according to claim 2 and wherein said image inspector comprises:

a rule scenario designing functionality including inspection functionality operative to inspect said electrical circuitry with reference to a set of general design rules;

a rule scenario learning functionality operative to learn the contents and structure of the design of said electrical circuitry and to generate a reference representation of said electrical circuitry having known desired attributes for use during the inspection of said electrical circuitry; and

a rule scenario inspection functionality operative to inspect electrical circuitry to determine defects with reference to said reference representation.