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Biasing scheme for large format CMOS active pixel sensors

  • US 7,408,577 B2
  • Filed: 04/09/2003
  • Issued: 08/05/2008
  • Est. Priority Date: 04/09/2003
  • Status: Active Grant
First Claim
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1. An image sensor comprising:

  • a pixel array including a plurality of pixels arranged in rows and columns, each pixel comprising a photosensor and a source follower transistor for reading out photosensor charges, said array further including a plurality of column lines to which pixels in a column can be coupled; and

    a plurality of read-out circuits respectively coupled to at least some of the plurality of column lines, each of the read-out circuits configured to provide pixel output signals and including a capacitor load having a first end connected to a reference voltage line and a second end switchably coupled through a first switch to a respective column line, and a second switch for directly coupling the first and second ends of said capacitor load together.

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