Methods for packaging image sensitive electronic devices

• US 7,419,854 B2
• Filed: 10/15/2005
• Issued: 09/02/2008
• Est. Priority Date: 06/04/2002
• Status: Expired due to Term

• Current Assignee: SuperMax Technology Ltd.
• Original Assignee: Micron Technology, Inc.
• Inventors: Cobbley, Chad A., Bolken, Todd O.
• Primary Examiner(s): Picardat; Kevin M
• Application Number:
  US11/250,907
• Publication Number:
  US 20060051892A1
• Time in Patent Office: 1,053 Days
• Field of Search: 438/106, 438124-127, 438/116, 438/64, 438/69, 257/687, 257/704
• US Class Current: 438/116
• CPC Class Codes: B33Y 80/00 Products made by additive manufacturing
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/484 Connecting portions
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 2224/92 Specific sequence of method steps
• CPC Class Codes: H01L 2224/92247 the second connecting process involving a wire connector
• CPC Class Codes: H01L 2225/06506 Wire or wire-like electrical connections between devices
• CPC Class Codes: H01L 2225/06555 Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
• CPC Class Codes: H01L 23/293 Organic, e.g. plastic
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 27/14603 : Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14618 : Containers
• CPC Class Codes: H01L 27/14625 : Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 27/14683 : Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/15174 : in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 31/0203 : Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: Y10S 257/924 : with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap

Abstract

The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment.

Claims

1. A method for assembling a package containing an electronic device sensitive to light or other radiation comprising:

mounting the electronic device on a carrier substrate having at least one conductive trace thereon, the at least one conductive trace having a first end and a second end;

providing at least one electrical interconnection between a bond pad on the electronic device and the first end of the at least one conductive trace;

encapsulating the first end of the at least one conductive trace, the at least one electrical interconnection and the bond pad of the electronic device with a nonconductive material dispensed in liquid form;

covering a surface of the electronic device with a transparent lid;

curing the liquid nonconductive material to at least a semisolid state; and

retaining the transparent lid by an adhesive interface with the nonconductive material.

2. The method according to claim 1, wherein the electronic device comprises an image sensor.

3. The method according to claim 1, wherein the electronic device comprises a solid-state device selected from a group consisting of a charge coupled device, a complementary metal-oxide semiconductor and an erasable programmable read-only memory.

4. The method according to claim 3, wherein the electronic device further comprises a chip stack.

5. The method according to claim 1, wherein the carrier substrate is made of a material selected from a group consisting of plastic, FR-4 and BT.

6. The method according to claim 5, further comprising fabricating the electronic device to comprise a plurality of semiconductor devices.

7. The method according to claim 1, further comprising forming the carrier substrate of a material comprising at least one of plastic, FR-4 and BT.

8. The method according to claim 7, further comprising:

attaching at least one discrete conductive element to the second end of the at least one conductive trace of the carrier substrate.

9. The method according to claim 8, wherein a plurality of the packages, each containing an electronic device, is formed onto a single carrier substrate and further comprising:

dividing the single carrier substrate into separate pieces, each of the pieces comprising one of the packages.

10. A method for assembling a package containing an electronic device sensitive to light or other radiation comprising:

mounting an electronic device on a carrier substrate, the carrier substrate comprising at least one conductive trace having a first end and a second end;

forming at least one electrical interconnection between the first end of the at least one conductive trace and a bond pad on the electronic device;

dispensing a liquid nonconductive material around a perimeter of the electronic device to encapsulate the at least one electrical interconnection, the bond pad and the first end of the at least one conductive trace;

placing a transparent lid over the electronic device and in contact with the liquid nonconductive material; and

curing the liquid nonconductive material to at least a semisolid state to retain the transparent lid in position over the electronic device.

11. The method of claim 10, wherein placing the transparent lid over the electronic device comprises placing the transparent lid directly against a surface of the electronic device.

12. The method of claim 10, wherein placing the transparent lid over the electronic device comprises inserting a gasket between the electronic device and the transparent lid.

13. The method of claim 10, further comprising forming a layer of molding compound over the liquid nonconductive material and in contact with a perimeter of the transparent lid.

14. The method of claim 10, further comprising attaching at least one discrete conductive element to the second end of the at least one conductive trace of the carrier substrate.

15. The method of claim 10, wherein mounting the electronic device on a carrier substrate comprises mounting a plurality of electronic devices onto a single carrier substrate.

16. The method of claim 15, further comprising dividing the single carrier substrate into individual packages.

17. The method of claim 10, wherein mounting an electronic device on a carrier substrate comprises mounting an electronic device comprising a chip stack on the carrier substrate.

18. The method of claim 10, wherein mounting an electronic device on a carrier substrate comprises mounting an image sensor on the carrier substrate.

19. The method of claim 10, wherein mounting an electronic device on a carrier substrate comprises mounting a solid state device on the carrier substrate, the solid state device selected from the group consisting of a charge coupled device, a complementary metal-oxide semiconductor and an erasable programmable read-only memory.