Battery protecting circuit

• US 7,423,410 B2
• Filed: 05/16/2006
• Issued: 09/09/2008
• Est. Priority Date: 05/16/2005
• Status: Active Grant

• Current Assignee: Texas Instruments Japan Limited (Texas Instruments, Inc.)
• Original Assignee: Texas Instruments, Inc.
• Inventors: Yoshio, Katsura
• Primary Examiner(s): Tso; Edward H
• Application Number:
  US11/383,517
• Publication Number:
  US 20060255768A1
• Time in Patent Office: 847 Days
• Field of Search: 320/107, 320/134, 320/136
• US Class Current: 320/134
• CPC Class Codes: H02J 7/0029 with safety or protection devices or circuits
• CPC Class Codes: H02J 7/00304 Overcurrent protection
• CPC Class Codes: H02J 7/007182 in response to battery voltage

Abstract

This invention provides a battery protecting circuit where even if the battery voltage falls nearly to zero volts due to overdischarge or the like while an NMOS transistor set in the power feeding path on the side of the positive electrode of the battery is turned ON/OFF, it is still possible to charge the battery by a constant charging current in a stable way. When the voltage of battery B1 has not reached the voltage needed for generating the driving voltage of NMOS transistors Q1, Q2 in drives 111, 112, the boosting operation of drives 111, 112 is stopped, and PMOS transistor Q3 inserted in a power feeding path different from that of said transistors is turned ON by driver 113. In driver 113, by clamping voltage VDD generated in the power feeding path of PMOS transistor Q3 to a voltage lower than it, driving voltage ZVO of PMOS transistor Q3 is generated without performing a boosting operation.

Claims

1. Battery protecting circuit comprising:

battery protecting circuit controling ON/OFF of a first switching circuit inserted in a first power feeding path between an external power source and a battery, and it has the following circuits;

a first switch driver generating a first driving voltage by boosting the voltage generated in said first power feeding path corresponding to an input control signal, and turns ON said first switching circuit with said first driving voltage;

a second switch driver generating a second driving voltage lower than the voltage generated in a second power feeding path between said external power source and said battery corresponding to the input control signal, and turns ON a second switching circuit inserted in said second power feeding path with the second driving voltage; and

a controller outputing said control signal such that when the voltage of said battery reaches the voltage needed for the boosting operation of said first switch driver, said first switch driver stops the boosting operation, and said second switch driver generates said second driving voltage.

2. The battery protecting circuit described in claim 1, wherein

said second switch driver generates said second driving voltage lower than the voltage generated in said second power feeding path between said external power source and said second switching circuit.

3. The battery protecting circuit described in claim 2, wherein

a first resistor is inserted in said second power feeding path between said second switching circuit and said battery.

4. The battery protecting circuit described in claim 1, wherein

a second resistor is inserted in said second power feeding path between said external power source and said second switching circuit;

and

said second switch driver generates said second driving voltage lower than the voltage generated in said second power feeding path between said second resistor and said second switching circuit.

5. The battery protecting circuit described in claim 1 comprising:

a power source circuit that generates the power source voltage of said controller based on the voltage fed to said external power source through said first power feeding path;

a reset circuit that outputs a reset signal when the power source voltage generated in said power source circuit is lower than a prescribed voltage;

Wherein said controller performs the following operation;

when said reset signal is received and it starts, it outputs said control signal such that said first switch driver stops the boosting operation, and said second switch driver generates said second driving voltage; and

when a prescribed signal is input to indicate that the voltage of said battery has reached the voltage needed for performing the boosting operation of said first switch driver, it outputs said control signal such that said first switch driver starts the boosting operation, and said second switch driver stops generating said second driving voltage.

6. The battery protecting circuit described in claim 1 wherein

said first switching circuit has

a first NMOS transistor inserted in said first power feeding path such that the diode contained between the drain and the source becomes forward biased with respect to the charging current flowing from said external power source to said battery;

a second NMOS transistor inserted in said first power feeding path such that the diode contained between the drain and the source becomes backward biased with respect to said charging current;

said second switching circuit

contains a first PMOS transistor inserted in said second power feeding path such that the diode contained between the drain and the source becomes backward biased with respect to said charging current;

said first switch driver boosts the voltage generated at the source of said first NMOS transistor and feeds it to the gate of said first NMOS transistor, and, at the same time, it boosts the voltage generated at the source of said second NMOS transistor and feeds it to the gate of said second NMOS transistor;

and said second switch driver feeds a voltage lower than the voltage generated at the source of said first PMOS transistor to the gate of said first PMOS transistor.

7. The battery protecting circuit described in claim 6, wherein

said first NMOS transistor and second number NMOS transistor have their drains connected in common,

and said first PMOS transistor is inserted in said second current path between the commonly connected drains of said first NMOS transistor and said second NMOS transistor and said battery.

19. The battery protecting circuit described in claim 2

a power source circuit that generates the power source voltage of said controller based on the voltage fed to said external power source through said first power feeding path;

a reset circuit that outputs a reset signal when the power source voltage generated in said power source circuit is lower than a prescribed voltage;

Wherein said controller performs the following operation;

when said reset signal is received and it starts, it outputs said control signal such that said first switch driver stops the boosting operation, and said second switch driver generates said second driving voltage; and

when a prescribed signal is input to indicate that the voltage of said battery has reached the voltage needed for performing the boosting operation of said first switch driver, it outputs said control signal such that said first switch driver starts the boosting operation, and said second switch driver stops generating said second driving voltage.

20. The battery protecting circuit described in claim 2 wherein

said first switching circuit has

a first NMOS transistor inserted in said first power feeding path such that the diode contained between the drain and the source becomes forward biased with respect to the charging current flowing from said external power source to said battery;

a second NMOS transistor inserted in said first power feeding path such that the diode contained between the drain and the source becomes backward biased with respect to said charging current;

said second switching circuit

contains a first PMOS transistor inserted in said second power feeding path such that the diode contained between the drain and the source becomes backward biased with respect to said charging current;

said first switch driver boosts the voltage generated at the source of said first NMOS transistor and feeds it to the gate of said first NMOS transistor, and, at the same time, it boosts the voltage generated at the source of said second NMOS transistor and feeds it to the gate of said second NMOS transistor;

and said second switch driver feeds a voltage lower than the voltage generated at the source of said first PMOS transistor to the gate of said first PMOS transistor.

8. Battery protecting circuit that controls ON/OFF of a switching circuit inserted in a power feeding path between an external power source and a battery, comprising:

a switch driver that generates a voltage by boosting the voltage generated in said power feeding path corresponding to an input control signal, and turns ON said switching circuit with said boosted voltage;

a driving voltage feeding circuit that feeds the voltage for turning ON said switching circuit from said external power source through said power feeding path to said switching circuit corresponding to the input control signal; and

a controller that outputs said control signal such that when the voltage of said battery does not reach the voltage needed for the boosting operation of said switch driver, said switch driver stops the boosting operation and said driving voltage feeding circuit feeds a driving voltage to said switching circuit.

9. The battery protecting circuit described in claim 8, wherein

said switching circuit has

a first NMOS transistor inserted in said power feeding path such that the diode contained between the drain and the source becomes forward biased with respect to the charging current flowing from said external power source to said battery;

a second NMOS transistor inserted in said power feeding path such that the diode contained between the drain and the source becomes backward biased with respect to said charging current;

said switch driver boosts the voltage generated at the source of said first NMOS transistor and feeds it to the gate of said first NMOS transistor, and, at the same time, it boosts the voltage generated at the source of said second NMOS transistor and feeds it to the gate of said second NMOS transistor;

said driving voltage feeding circuit has

a second PMOS transistor connected between the drain and gate of said second NMOS transistor;

and a transistor driver that drives said second PMOS transistor ON/OFF corresponding to the control signal of said controller.

10. The battery protecting circuit described in claim 9, wherein

it has a diode connected in series to said second PMOS transistor such that the current flowing to said second PMOS transistor is stopped by said boosted voltage of said switch driver.

11. The battery protecting circuit described in claim 9 wherein

it has a first terminal for input of the voltage for selecting the charging mode of said battery;

a judgment circuit that judges whether a voltage is fed from said external power source through said power feeding path to said first terminal;

a power source circuit that generates the power source voltage of said controller based on the voltage fed from said external power source through said power feeding path;

a reset circuit that outputs a reset signal when the power source voltage generated in said power source circuit is lower than a prescribed voltage;

when a voltage is fed from said external power source through said power feeding path to said first terminal, said transistor driver drives ON said second PMOS transistor if said reset circuit outputs said reset signal or said controller outputs said control signal for turning ON said second PMOS transistor;

said controller performs the following operation;

when said reset signal is received and it starts, it outputs said control signal such that said first switch driver stops the boosting operation;

when said reset circuit stops output of said reset signal, if said judgment circuit judges that the voltage from said external power source is fed to said first terminal, it outputs said control signal such that said transistor driver turns ON said second PMOS transistor; and

when a signal is input indicating that the voltage of said battery has reached the voltage needed for the boosting operation of said switch driver, it outputs said control signal such that said switch driver starts the boosting operation, and said transistor driver turns OFF said second PMOS transistor.

12. Battery protecting circuit for driving first and second transistors of a battery device that has a secondary battery and first and second transistors connected in series between a power source terminal of the secondary battery and an external power source terminal comprising

the battery protecting circuit has

a first driver that feeds a first driving signal to the control terminal of said first transistor,

a second driver that feeds a second driving signal to the control terminal of said second transistor;

a mode selector that contains a mode selection terminal that applies a voltage corresponding to the voltage fed to the external power source terminal or a reference voltage, a fourth transistor that can be connected between a connection middle point between said first transistor and said second transistor and the control terminal of said second transistor, and a driver for feeding a fourth driving signal to the control terminal of said fourth transistor corresponding to the voltage applied on said mode selection terminal; and

wherein

when current is fed from the external power source terminal to the secondary battery, if the voltage appearing at said mode selection terminal is a voltage corresponding to the voltage fed to said external power source terminal, said fourth transistor is turned ON.

13. The battery protecting circuit described in claim 12, comprising a voltage monitoring circuit that monitors the voltage fed to the external power source terminal;

a power source circuit that can feed power from the connection middle point between said first transistor and said second transistor; and

wherein

said power source circuit starts the internal power source voltage after said voltage monitoring circuit detects a prescribed voltage.

14. The battery protecting circuit described in claim 12 wherein

said first and second transistors are first and second NMOS transistors having their drains connected to each other.

15. Battery protecting circuit for driving the first, second and third transistors of a battery device that has a secondary battery, a first and a second transistor connected in series between a power source terminal of the secondary battery and an external power source terminal and a third transistor connected between a connection middle point between said first transistor and said second transistor and the power source terminal of the secondary battery comprising

the battery protecting circuit has

a first driver that feeds a first driving signal to the control terminal of said first transistor;

a second driver that feeds a second driving signal to the control terminal of said second transistor;

a third driver that feeds a third driving signal to the control terminal of said third transistor;

a mode selector that contains a mode selection terminal that applies a voltage corresponding to the voltage fed to the external power source terminal or a reference voltage, a fourth transistor that can be connected between the connection middle point between said first transistor and said second transistor and the control terminal of said second transistor, and a driver for feeding a fourth driving signal to the control terminal of said fourth transistor corresponding to the voltage applied on said mode selection terminal,

a voltage monitoring circuit for monitoring the voltage fed to the external power source terminal;

a power source circuit, with power fed from the connection middle point between said first transistor and said second transistor, which starts feeding of an internal power source voltage after said voltage monitoring circuit detects a prescribed voltage;

when current is fed from the external power source terminal to the secondary battery;

if the voltage appearing at said mode selection terminal is a voltage corresponding to the reference voltage, said fourth transistor is turned OFF; and

wherein

when an internal power source voltage is not fed from said power source circuit, said third driver responds to the voltage appearing at the connection middle point between said first transistor and said second transistor and feeds the third driving signal to turn ON said third transistor.

16. The battery protecting circuit described in claim 15, wherein

said battery device has a first resistance element connected between the power source terminal of the secondary battery and said third transistor.

17. The battery protecting circuit described in claim 15, wherein

said battery device has a second resistance element connected between a connection middle point between said first transistor and said second transistor and said third transistor.

18. The battery protecting circuit described in claim 15 wherein

said first and second transistors are first and second NMOS transistors with their drains connected to each other;

and

said third transistor is a PMOS transistor having its source connected to the drains of said first and second NMOS transistors.