Image sensor with a gated storage node linked to transfer gate
First Claim
Patent Images
1. A method of operating a plurality of pixels of an image sensor comprising:
- accumulating a first charge in a first photosensor;
transferring said first charge from said first photosensor to a first storage node within a first pixel;
transferring said first charge from said first storage node to a floating diffusion node;
reading out the first charge from said floating diffusion node as an output signal of said first pixel;
accumulating a second charge in a second photosensor;
transferring said second charge from said second photosensor to a second storage node within a second pixel;
transferring said second charge from said second storage node to said floating diffusion node; and
reading out the second charge from said floating diffusion node as an output signal of said second pixels,wherein said transferring steps occur on half clock cycles.
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Abstract
A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutter gate on during the integration period to increase the amount of time for charge storage by a pixel.
106 Citations
25 Claims
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1. A method of operating a plurality of pixels of an image sensor comprising:
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accumulating a first charge in a first photosensor; transferring said first charge from said first photosensor to a first storage node within a first pixel; transferring said first charge from said first storage node to a floating diffusion node; reading out the first charge from said floating diffusion node as an output signal of said first pixel; accumulating a second charge in a second photosensor; transferring said second charge from said second photosensor to a second storage node within a second pixel; transferring said second charge from said second storage node to said floating diffusion node; and reading out the second charge from said floating diffusion node as an output signal of said second pixels, wherein said transferring steps occur on half clock cycles. - View Dependent Claims (2, 3)
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4. A method of reading charge from pixels of an image sensor comprising:
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turning on a first transfer gate transistor associated with a first pixel to transfer a first charge from a storage node within said first pixel to a floating diffusion node; providing an output signal of said first pixel with an output transistor coupled to said floating diffusion node; turning on a row select transistor connected to the output transistor to output the first charge from said floating diffusion node; while the row select transistor remains on, turning on a second transfer gate transistor associated with a second pixel to transfer a second charge from a storage node within said second pixel to said floating diffusion node; and providing an output signal of said second output transistor which is output by said row select transistor. - View Dependent Claims (5, 6)
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7. A method of reading charge from pixels of an image sensor comprising:
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turning on a first transfer gate transistor associated with a first pixel to transfer a first charge from a storage node within a substrate of said first pixel to a floating diffusion node; providing an output signal of said first pixel from said first charge stored in said floating diffusion node; turning on a row select transistor to output said first pixel output signal; turning on a second transfer gate transistor associated with a second pixel to transfer a second charge from a storage node within said second pixel to said floating diffusion node; providing an output signal of said second pixel from said second charge stored in said floating diffusion node; and turning on a row select transistor connected to the floating diffusion node to output said second pixel output signal, wherein the transfer of said first and second charges occur on respective half clock cycles.
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8. A pixel circuit comprising:
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a plurality of photosensors for accumulating charge; a plurality of first transistors for transferring charge from a respective one of said photosensors to a respective first storage node; a plurality of second transistors for transferring charge from said respective first storage node to a respective second storage node; and a readout circuit for providing a pixel output signal based on charges transferred to said respective second storage nodes, wherein a plurality of barrier regions are controlled by a respective one of said first transistors, said barrier region separating said respective photosensor from said respective first storage node. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. A pixel circuit for use in an imaging device, said pixel circuit comprising:
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a plurality of photosensors for generating charge during an integration period; a plurality of shutter transistors, each shutter transistor connected to and transferring charge from a respective photosensor; a plurality of storage nodes, each node connected to a respective shutter transistor and storing charge transferred by a respective one of said plurality of photosensors; a plurality of transfer gates, each transfer gate connected to and transferring charge from a respective storage node; a floating diffusion node connected to said plurality of transfer gates for receiving charge from said storage nodes; and a readout circuit connected to said floating diffusion node to output charge accumulated at the floating diffusion node, wherein a plurality of barrier regions are controlled by a respective one of said shutter transistors, said barrier region separating said respective photosensor from said respective storage node. - View Dependent Claims (17, 18)
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19. An imaging system comprising:
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a processor; and an imaging device comprising an array of pixels, coupled to said imaging system said array comprising; a plurality of photosensors for generating charge during an integration period; a plurality of shutter transistors, each shutter transistor connected to and transferring charge from a respective photosensor; a plurality of storage nodes, each storage node connected to a respective shutter transistor and storing charge transferred by a respective one of said plurality of photosensors; a plurality of barrier regions, each barrier region separating a respective photosensor from its respective storage node; a plurality of transfer gates, each transfer gate connected to and transferring charge from a respective storage node; a floating diffusion node connected to said plurality of transfer gates for receiving charge from said transfer gates; and a readout circuit connected to said floating diffusion node to output charge accumulated at the floating diffusion nodes, wherein a barrier region is controlled by one of said shutter transistors, said barrier region separating said photosensor from said respective storage node.
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20. An imaging system comprising:
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a processor; and an imaging device comprising an array of pixels, coupled to said imaging system said array comprising; a plurality of photosensors for accumulating charge; a plurality of first transistors for transferring charge from a respective one of said photosensors to a respective first storage node; a plurality of second transistors for transferring charge from said respective first storage node to a respective second storage node; and a readout circuit for providing a pixel output signal based on charges transferred to said respective second storage nodes, wherein a barrier region is controlled by one of said first transistors, said barrier region separating said photosensor from said respective first storage node. - View Dependent Claims (21, 22, 23, 24, 25)
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Specification