System and method for policing multiple data flows and multi-protocol data flows

• US 7,453,892 B2
• Filed: 02/16/2005
• Issued: 11/18/2008
• Est. Priority Date: 05/04/2001
• Status: Expired due to Fees

• Current Assignee: RPX Corporation
• Original Assignee: SLT Logic LLC
• Inventors: Buskirk, Glenn A., Santiago, Rodolfo A.
• Primary Examiner(s): HO, DUC CHI
• Application Number:
  US11/058,904
• Publication Number:
  US 20050195855A1
• Time in Patent Office: 1,371 Days
• Field of Search: None
• US Class Current: 370/401
• CPC Class Codes: H04J 3/1617 carrying packets or ATM cells
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/20 Traffic policing
• CPC Class Codes: H04L 47/21 using leaky-bucket
• CPC Class Codes: H04L 47/2441 relying on flow classification, e.g. using integrated services [IntServ]
• CPC Class Codes: H04L 47/29 using a combination of thresholds
• CPC Class Codes: H04L 47/31 by tagging of packets, e.g. using discard eligibility [DE] bits
• CPC Class Codes: H04L 47/32 by discarding or delaying data units, e.g. packets or frames
• CPC Class Codes: H04L 47/36 by determining packet size, e.g. maximum transfer unit [MTU]
• CPC Class Codes: H04L 47/43 Assembling or disassembling of packets, e.g. segmentation and reassembly [SAR]

Abstract

A system and method for policing one or more flows of a data stream of packets associated with differing transmission protocols. The current capacity level for each flow is determined, as is the packet protocol associated with each packet. A packet parameter in the packet that is indicative of the bandwidth consumption of the packet is identified. The packet parameter is converted to a predetermined format if the packet is not associated with a predetermined packet protocol. A common bandwidth capacity test is performed to determine whether the packet is conforming or non-conforming, and is a function of the packet parameter and the current bandwidth capacity level.

Claims

1. A system for directing data packets within a communications network comprising:

a switching fabric operable to switch multiplexed flows of data packets;

a plurality of line interface cards, each card including;

an ingress interface operably configured to receive multi-protocol data packets from the communication network;

ingress processing circuitry operably coupled to the ingress interface, the ingress processing circuitry including an ingress processor, a classification engine, a policing engine, and

an editor engine operably arranged in a data flow communication with each other to process data packets received by the ingress interface as multiplexed data flows, said editor engine including an editing module with a plurality of editing instruction and configured to execute multiple transformations per packet using at least one editing instruction selected from the plurality of editing instructions responsive to at least one output of said classification engine;

first fabric interface circuitry operably coupled between the ingress processing circuitry and the switching fabric to translate multi-protocol, multiplexed data flows from the ingress processing into a first common protocol multiplexed data flow to the switching fabric;

second fabric interface circuitry operably coupled to the switching fabric to receive a second common protocol multiplexed data flow from the switching fabric;

an egress interface operably configured to transmit multi-protocol data packets to the communication network; and

egress processing circuitry operably coupled between the second fabric interface circuitry and the egress interface to process multi-protocol data packets to transmit to the egress interface in response to the second common protocol multiplexed data flow,

wherein the multi-protocol data packets are caused to be indicative of a conformance of the packets to at least one network bandwidth capacity related congestion flow control policy.

2. The systems of claim 1 wherein the ingress interface is an industry standard physical layer device at which said data packets are received, the industry standard physical layer device at least one of an OC-192 framer, and a 200 MHz Optical Internet Forum (OIF) System Packet Interface-4 (SPI-4) including a 64-bit data input.

3. The system of claim 1 wherein the classification engine, the policing engine, the high speed editor and the processor are co-located on a monolithic chip to form an ingress packet processing circuit capable of being operatively interfaced to an industry standard physical layer device (PHY) through said ingress interface.

4. A system for directing data packets within a communications network comprising:

a switching fabric operable to switch multiplexed flows of data packets;

a plurality of line interface cards, each card including;

an ingress interface operably configured to receive multi-protocol data packets from the communication network;

ingress processing circuitry operably coupled to the ingress interface, the ingress processing circuitry including an ingress processor, a classification engine, a policing engine, and

an editor engine operably arranged in a data flow communication with each other to process data packets received by the ingress interface as multiplexed data flows;

first fabric interface circuitry operably coupled between the ingress processing circuitry and the switching fabric to translate multi-protocol, multiplexed data flows from the ingress processing into a first common protocol multiplexed data flow to the switching fabric;

second fabric interface circuitry operably coupled to the switching fabric to receive a second common protocol multiplexed data flow from the switching fabric;

an egress interface operably configured to transmit multi-protocol data packets to the communication network; and

egress processing circuitry operably coupled between the second fabric interface circuitry and the egress interface to process multi-protocol data packets to transmit to the egress interface in response to the second common protocol multiplexed data flow,

wherein the multi-protocol data packets are caused to be indicative of a conformance of the packets to at least one network bandwidth capacity related congestion flow control policy and wherein said system further including a pre-processor configured to receive said data packets and perform packet verification and discarding, packet protocol identification, and statistics compilation on at least one packet in the stream.

5. A system for directing data packets within a communication network comprising:

a switching fabric operable to switch multiplexed flows of data packets;

a plurality of line interface cards, each card including;

an ingress interface operably configured to receive multi-protocol data packets from the communication network;

ingress processing circuitry operably coupled to the ingress interface, the ingress processing circuitry including an ingress processor, a classification engine, a policing engine, and

an editor engine operably arranged in a data flow communication with each other to process data packets received by the ingress interface as multiplexed data flows;

first fabric interface circuitry operably coupled between the ingress processing circuitry and the switching fabric to translate multi-protocol, multiplexed data flows from the ingress processing into a first common protocol multiplexed data flow to the switching fabric;

second fabric interface circuitry operably coupled to the switching fabric to receive a second common protocol multiplexed data flow from the switching fabric;

an egress interface operably configured to transmit multi-protocol data packets to the communication network; and

egress processing circuitry operably coupled between the second fabric interface circuitry and the egress interface to process multi-protocol data packets to transmit to the egress interface in response to the second common protocol multiplexed data flow,

wherein the multi-protocol data packets are caused to be indicative of a conformance of the packets to at least one network bandwidth capacity related congestion flow control policy and wherein said system further including a pre-processor configured to receive said data packets and perform packet verification and discarding, packet protocol identification, and statistics compilation on at least one packet in the stream and wherein the pre-processor includes a multistage algorithm coupled with a Content Addressable Memory (CAM) and a Static Random Access Memory (SRAM) suited to resolve at least one protocol associated with one or more layers of a Open System Interconnect (OSI) communication standard and to cause at least one frame in said incoming data packets to be classified and protocol layer code to be generated.

6. The system of claim 5 wherein the preprocessor interfaces with the classification engine configured as a programmable parsing engine to perform layer classification and tagging via a search engine.

7. The system of claim 6 wherein the programmable parsing engine is configured to use a protocol layer code output by said pre-processor to retrieve instructions that allow the parsing engine to generate at least one search key from the frame such that the at least one search key applied against the CAM returns information containing a frame classification.

8. The system of claim 6 wherein the programmable parsing engine communicates with a policing engine configured to ensure flow conformance, the policing engine operatively coupled to a policing memory adapted to store parameters associated with each connection.

9. The system of claim 8 wherein the policing engine is in data flow communication with a high-speed editor for receiving streaming data of networking protocols associated with one or more layers of the OSI, the high-speed editor equipped for facilitating the execution of at least one edit per packet required to effectuate a Quality of Service enforced at said policing engine.

10. A system for directing data packets within a communication network comprising:

a switching fabric operable to switch multiplexed flows of data packets;

a plurality of line interface cards, each card including;

an ingress interface operably configured to receive multi-protocol data packets from the communication network;

ingress processing circuitry operably coupled to the ingress interface, the ingress processing circuitry including an ingress processor, a classification engine, a policing engine, and

an editor engine operably arranged in a data flow communication with each other to process data packets received by the ingress interface as multiplexed data flows;

first fabric interface circuitry operably coupled between the ingress processing circuitry and the switching fabric to translate multi-protocol, multiplexed data flows from the ingress processing into a first common protocol multiplexed data flow to the switching fabric;

second fabric interface circuitry operably coupled to the switching fabric to receive a second common protocol multiplexed data flow from the switching fabric;

an egress interface operably configured to transmit multi-protocol data packets to the communication network; and

egress processing circuitry operably coupled between the second fabric interface circuitry and the egress interface to process multi-protocol data packets to transmit to the egress interface in response to the second common protocol multiplexed data flow,

wherein the multi-protocol data packets are caused to be indicative of a conformance of the packets to at least one network bandwidth capacity related congestion flow control policy and wherein said system further including a pre-processor configured to receive said data packets and perform packet verification and discarding, packet protocol identification, and statistics compilation on at least one packet in the stream and wherein the pre-processor includes a multistage algorithm coupled with a Content Addressable Memory (CAM) and a Static Random Access Memory (SRAM) suited to resolve at least one protocol associated with one or more layers of a Open System Interconnect (OSI) communication standard and to cause at least one frame in said incoming data packets to be classified and protocol layer code to be generated and wherein the preprocessor interfaces with the classification engine configured as a programmable parsing engine to perform layer classification and tagging via a search engine and wherein the programmable parsing engine is configured to use a protocol layer code output by said pre-processor to retrieve instructions that allow the parsing engine to generate at least one search key from the frame such that the at least one search key applied against the CAM returns information containing a frame classification and wherein the programmable parsing engine communicates with a policing engine configured to ensure flow conformance, the policing engine operatively coupled to a policing memory adapted to store parameters associated with each connection and wherein the policing engine is in data flow communication with a high-speed editor for receiving streaming data of networking protocols associated with one or more layers of the OSI, the high-speed editor equipped for facilitating the execution of at least one edit per packet required to effectuate a Quality of Service enforced at said policing engine and edit per packet causes said incoming data packet stream to be associated with at least one label.

11. The system of claim 10 wherein said ingress processing circuit further included a traffic director that receives the labeled data packet stream and directs the data packet stream to the ingress fabric interface.