Method and apparatus for implementing a GPS receiver on a single integrated circuit
First Claim
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1. A method of controlling an integrated circuit in a Global Positioning System (“
- GPS”
), said integrated circuit comprising at least one radio receiver section, at least one data memory section, and at least one digital signal processing section, comprising;
a) switching the digital signal processing section into a low noise mode in response to a predetermined timing function whereby the digital signal processing section operates in the low noise mode for a predetermined fixed time interval;
b) collecting data with the radio receiver section and storing the data into the data memory section;
c) switching the digital signal processing section into a processing mode in response to expiration of the predetermined fixed time interval; and
d) processing the data collected in the data memory section using the digital signal processing section.
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Abstract
The present invention discloses a method and apparatus for allowing for GPS receiver functions and GPS digital processing functions to co-exist and function optionally or nearly optimally while in close proximity on a common die.
58 Citations
19 Claims
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1. A method of controlling an integrated circuit in a Global Positioning System (“
- GPS”
), said integrated circuit comprising at least one radio receiver section, at least one data memory section, and at least one digital signal processing section, comprising;a) switching the digital signal processing section into a low noise mode in response to a predetermined timing function whereby the digital signal processing section operates in the low noise mode for a predetermined fixed time interval; b) collecting data with the radio receiver section and storing the data into the data memory section; c) switching the digital signal processing section into a processing mode in response to expiration of the predetermined fixed time interval; and d) processing the data collected in the data memory section using the digital signal processing section. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
- GPS”
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9.
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10. An integrated circuit in a Global Positioning System (“
- GPS”
) comprising;at least one radio receiver section; at least one digital signal processing section having at least a processing mode and a low noise mode; and a timing section, wherein the timing section synchronizes switching of digital signal processing section modes with data collection in the radio receiver section in response to a predetermined timing function, whereby each of the digital signal processing section modes operates for a predetermined fixed time interval. - View Dependent Claims (11, 12, 13, 14)
- GPS”
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15. A Global Positioning System (“
- GPS”
) receiver incorporating an integrated circuit formed from a single die comprising;at least one radio receiver section; at least one data memory section; at least one digital signal processing section having at least a processing mode and a low noise mode; and a timing section, wherein the timing section synchronizes switching of digital signal processing section modes with data collection in the radio receiver section in response to a predetermined timing function, whereby each of the digital signal processing section modes operates for a predetermined fixed time interval. - View Dependent Claims (16, 17, 18, 19)
- GPS”
Specification