Current-controlled CMOS circuits with inductive broadbanding
First Claim
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1. An apparatus, comprising:
- a first circuitry, implemented using current-controlled complementary metal-oxide semiconductor (C3MOS) logic with inductive broadbanding, wherein logic levels are signaled by current steering in one of two or more branches in response to differential input signals that correspond to a first signal, and wherein first and second series connected RL circuits respectively couple first and second output nodes of a logic element to a power supply node, that is operable to;
receive the first signal;
process the first signal thereby generating a first plurality of signals such that each signal of the first plurality of signals has a first frequency; and
output the first plurality of signals; and
a second circuitry, implemented using conventional complementary metal-oxide-semiconductor (CMOS) logic wherein substantially zero static current is dissipated, that is operable to;
receive the first plurality of signals;
process the first plurality of signals thereby generating a second signal such that the second signal has a second frequency; and
output the second signal.
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Abstract
Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic with inductive broadbanding fabricated in conventional CMOS process technology. Optimum balance between power consumption and speed for each circuit application is achieved by combining high speed C3MOS logic with inductive broadbanding/C3MOS logic with low power conventional CMOS logic. The combined C3MOS logic with inductive broadbanding/C3MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems.
12 Citations
20 Claims
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1. An apparatus, comprising:
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a first circuitry, implemented using current-controlled complementary metal-oxide semiconductor (C3MOS) logic with inductive broadbanding, wherein logic levels are signaled by current steering in one of two or more branches in response to differential input signals that correspond to a first signal, and wherein first and second series connected RL circuits respectively couple first and second output nodes of a logic element to a power supply node, that is operable to; receive the first signal; process the first signal thereby generating a first plurality of signals such that each signal of the first plurality of signals has a first frequency; and output the first plurality of signals; and a second circuitry, implemented using conventional complementary metal-oxide-semiconductor (CMOS) logic wherein substantially zero static current is dissipated, that is operable to; receive the first plurality of signals; process the first plurality of signals thereby generating a second signal such that the second signal has a second frequency; and output the second signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An apparatus, comprising:
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a first circuitry, implemented using current-controlled complementary metal-oxide semiconductor (C3MOS) logic with inductive broadbanding, wherein logic levels are signaled by current steering in one of two or more branches in response to differential input signals that correspond to a first signal, and wherein first and second series connected RL circuits respectively couple first and second output nodes of a first logic element to a power supply node, that is operable to; receive a first signal; process the first signal thereby generating a first plurality of signals such that each signal of the first plurality of signals has a first frequency; and output the first plurality of signals; and a second circuitry, implemented using C3MOS logic, wherein logic levels are signaled by current steering in one of two or more branches in response to differential input signals that correspond to at least one signal of the first plurality of signals, and wherein third and fourth series connected RL circuits respectively couple third and fourth output nodes of a second logic element to the power supply node, that is operable to; receive the first plurality of signals; process the first plurality of signals thereby generating a second signal such that the second signal has a second frequency; and output the second signal. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. An apparatus, comprising:
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a circuitry, implemented using current-controlled complementary metal-oxide semiconductor (C3MOS) logic with inductive broadbanding, that is operable to; receive a first plurality of signals such that each signal of the first plurality of signals has a first frequency; process the first plurality of signals thereby generating a serialized signal there from such that the serialized signal has a second frequency, wherein the serializer includes; a first differential transistor that includes a first gate, a first source, and a first drain; a second differential transistor that includes a second gate, a second source, and a second drain; a current source that is coupled to both the first source and the second source; a first series connected RL circuit that communicatively couples between the first drain and a logic high level; a second series connected RL circuit that communicatively couples between the second drain and the logic high level; a first capacitive load coupled to the first drain; and a second capacitive load coupled to the second drain; and
wherein;the first gate and the second gate are differential inputs of the serializer that receive at least one signal of the first plurality of signals; and the first drain and the second drain are differential outputs that output at least a portion of the serialized signal. - View Dependent Claims (19, 20)
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Specification