Semiconductor memory cell and semiconductor memory device

• US 7,507,995 B2
• Filed: 06/07/2006
• Issued: 03/24/2009
• Est. Priority Date: 03/22/2002
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Isobe, Atsuo, Miyairi, Hidekazu, Kato, Kiyoshi, Yamazaki, Shunpei
• Primary Examiner(s): Quach; Tuan N.
• Application Number:
  US11/447,931
• Publication Number:
  US 20060267073A1
• Time in Patent Office: 1,021 Days
• Field of Search: 257/66, 257/72, 257/315, 257/347, 257/353, 257/E27.111, 257/E29.293
• US Class Current: 257/66
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1281 by using structural features to control crystal growth, e.g. placement of grain filters
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42332 with the floating gate formed by two or more non connected parts, e.g. multi-particles flating gate
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 41/40 characterised by the peripheral circuit region
• CPC Class Codes: H10B 41/49 comprising different types of peripheral transistor
• CPC Class Codes: H10B 43/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

An insulating film with a linear concave portion is formed and a semiconductor film is formed thereon by deposition. The semiconductor film is irradiated with laser light to melt the semiconductor film and the melted semiconductor is poured into the concave portion, where it is crystallized. This makes distortion or stress accompanying crystallization concentrate on other regions than the concave portion. A surface of this crystalline semiconductor film is etched away, thereby forming in the concave portion a crystalline semiconductor film which is covered with side walls of the concave portion from the sides and which has no other grain boundaries than twin crystal. TFTs and memory TFTs having this crystalline semiconductor film as their channel regions are highly reliable, have high field effect mobility, and are less fluctuated in characteristic. Accordingly, a highly reliable semiconductor memory device which can operate at high speed is obtained.

Claims

1. A semiconductor memory device comprising:

a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, and wherein side surfaces of the channel region are in contact with insulating films formed over the substrate;

a gate insulating film formed over the semiconductor active layer and the insulating films;

an electric charge accumulating layer formed over the gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region; and

a control gate electrode formed over the electric charge accumulating layer.

2. A semiconductor memory device according to claim 1, wherein the substrate comprises a glass.

3. A semiconductor memory device according to claim 1, wherein the insulating films form a stripe pattern.

4. A semiconductor memory device according to claim 1, wherein the semiconductor active layer comprises a crystalline semiconductor film that contains no other grain boundaries than twin crystal.

5. A semiconductor memory device according to claim 1, wherein the semiconductor memory device is incorporated in at least one selected from the group consisting of a game machine, a video camera, a head-mount display, a DVD player, a personal computer, a cellular phone, and an audio system.

6. A semiconductor memory device comprising:

a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, wherein side surfaces of the channel region are in contact with insulating films formed over the substrate, and wherein the semiconductor active layer is thinner than the insulating films;

a gate insulating film formed over the semiconductor active layer and the insulating films;

an electric charge accumulating layer formed over the gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region; and

a control gate electrode formed over the electric charge accumulating layer.

7. A semiconductor memory device according to claim 6, wherein the substrate comprises a glass.

8. A semiconductor memory device according to claim 6, wherein the insulating films form a stripe pattern.

9. A semiconductor memory device according to claim 6, wherein the semiconductor active layer comprises a crystalline semiconductor film that contains no other grain boundaries than twin crystal.

10. A semiconductor memory device according to claim 6, wherein the semiconductor memory device is incorporated in at least one selected from the group consisting of a game machine, a video camera, a head-mount display, a DVD player, a personal computer, a cellular phone, and an audio system.

11. A semiconductor memory device comprising:

a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, and wherein side surfaces of the channel region are in contact with insulating films formed over the substrate;

a first gate insulating film formed over the semiconductor active layer and the insulating films;

an electric charge accumulating layer formed over the first gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region;

a second gate insulating film formed over the electric charge accumulating layer; and

a control gate electrode formed over the electric charge accumulating layer.

12. A semiconductor memory device according to claim 11, wherein the substrate comprises a glass.

13. A semiconductor memory device according to claim 11, wherein the insulating films form a stripe pattern.

14. A semiconductor memory device according to claim 11, wherein the semiconductor active layer comprises a crystalline semiconductor film that contains no other grain boundaries than twin crystal.

15. A semiconductor memory device according to claim 11, wherein the semiconductor memory device is incorporated in at least one selected from the group consisting of a game machine, a video camera, a head-mount display, a DVD player, a personal computer, a cellular phone, and an audio system.

16. A semiconductor memory device comprising:

a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, wherein side surfaces of the channel region are in contact with insulating films formed over the substrate, and wherein the semiconductor active layer is thinner than the insulating films;

a first gate insulating film formed over the semiconductor active layer and the insulating films;

an electric charge accumulating layer formed over the first gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region;

a second gate insulating film formed over the electric charge accumulating layer; and

a control gate electrode formed over the electric charge accumulating layer.

17. A semiconductor memory device according to claim 16, wherein the substrate comprises a glass.

18. A semiconductor memory device according to claim 16, wherein the insulating films form a stripe pattern.

19. A semiconductor memory device according to claim 16, wherein the semiconductor active layer comprises a crystalline semiconductor film that contains no other grain boundaries than twin crystal.

20. A semiconductor memory device according to claim 16, wherein the semiconductor memory device is incorporated in at least one selected from the group consisting of a game machine, a video camera, a head-mount display, a DVD player, a personal computer, a cellular phone, and an audio system.