Method and system for congestion control based on optimum bandwidth allocation in a fibre channel switch

• US 7,512,067 B2
• Filed: 07/20/2004
• Issued: 03/31/2009
• Est. Priority Date: 07/21/2003
• Status: Expired due to Fees

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: QLogic Corporation (Marvell Technology Group Limited)
• Inventors: Dropps, Frank R., Papenfuss, Gary M.
• Primary Examiner(s): Yao; Kwang B.
• Assistant Examiner(s): Lai; Andrew
• Application Number:
  US10/894,536
• Publication Number:
  US 20050018606A1
• Time in Patent Office: 1,715 Days
• Field of Search: 370229-230, 370231-232, 370233-234, 370235-238, 370/455, 370/461
• US Class Current: 370/230
• CPC Class Codes: H04L 12/10 Current supply arrangements
• CPC Class Codes: H04L 49/101 using crossbar or matrix
• CPC Class Codes: H04L 49/351 for local area network [LAN], e.g. Ethernet switches
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: H04L 49/50 Overload detection or protection within a single switching element

Abstract

A method and system for optimizing bandwidth allocation in a fiber channel network having a fiber channel switch element, is provided. The switch element includes, a port control module having a receive and transmit segment, wherein the transmit segment is programmed to block frame transmission from a particular frame source port for a certain duration based on a programmable threshold value. The method includes, enabling a bandwidth limitation counter; and programming the threshold value for blocking frame transmission from a frame source port for a certain duration and during this duration, other source ports may be chosen for frame transmission. After a frame is transmitted from a source port, a tag valid blocking from the same source port is used to block frame transmission. A quality of service register is used to store the threshold value and the threshold value is programmable.

Claims

1. A method for optimizing bandwidth allocation in a fibre channel network having a fibre channel switch element, comprising:

enabling a first bandwidth limitation counter in bandwidth limiting logic, the first bandwidth limitation counter being configured to measure a first duration corresponding to an amount of time to pass a full-length frame;

enabling a second bandwidth limitation counter in the bandwidth limiting logic, the second bandwidth limitation counter being configured to count from zero to a threshold value x;

sending a frame from a source port and generating a frame depart signal denoting that the source port has completed transfer of the frame;

the second bandwidth limitation counter, upon receiving the frame depart signal, counting an interval from zero to x;

wherein a signal from the first bandwidth limitation counter increments the second bandwidth limitation counter; and

during the interval frame transmission from the source port is blocked but other source ports may be chosen for frame transmission.

2. The method of claim 1, wherein blocking frame transmission from the source port comprises blocking a valid bit in a transmit tag register of the bandwidth limiting logic.

3. The method of claim 1, further comprising the step of programming the value of x in a quality of service register.

4. The method of claim 1 further comprising a transmit credit signal stopping the first bandwidth limitation counter from counting when no transmit credit is available.

5. The method of claim 1, further comprising the second bandwidth limitation counter receiving a bandwidth limiting enable signal to enable bandwidth limiting.

6. Bandwidth limiting logic in a transmit segment of a fibre channel switch element, comprising:

a first bandwidth limitation counter configured to measure a first duration corresponding to an amount of time to pass a full-length frame; and

a second bandwidth limitation counter configured to count an interval from zero to a threshold value x upon receiving a frame depart signal denoting that a source port has completed transfer of a frame, and during the interval frame transmission from the source port is blocked but other source ports may be chosen for frame transmission;

wherein the first bandwidth limitation counter is configured to generate a signal that increments the second bandwidth limitation counter.

7. The bandwidth limiting logic of claim 6, wherein during the interval the transmit segment may select another source port for frame transmission.

8. The bandwidth limiting logic of claim 6, further comprising a programmable register configured to store the programmable threshold value x.

9. The bandwidth limiting logic of claim 6, wherein a value of the second bandwidth limitation counter is compared to the threshold value x to determine whether the source port should be blocked.

10. The bandwidth limiting logic of claim 6, further comprising a transmit credit signal configured to stop the first bandwidth limitation counter from counting when no transmit credit is available.

11. The bandwidth limiting logic of claim 6, further comprising a bandwidth limiting enable signal configured to enable bandwidth limiting.