Voltage supplier of semiconductor memory device

• US 7,514,986 B2
• Filed: 02/06/2008
• Issued: 04/07/2009
• Est. Priority Date: 05/06/2004
• Status: Expired due to Fees

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Lee, Jae-Jin, Lee, Kang-Seol
• Primary Examiner(s): Lincoln; Donovan
• Assistant Examiner(s): Hiltunen; Thomas J
• Application Number:
  US12/027,089
• Publication Number:
  US 20080129373A1
• Time in Patent Office: 426 Days
• Field of Search: 327/536, 363 59- 60
• US Class Current: 327/536
• CPC Class Codes: G11C 5/145 Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor G11C5/141 takes precedence

Abstract

The present invention provides voltage supplier for supplying an internal voltage with optimized drivability required for internal operation. The voltage supplier of a semiconductor memory device includes: an internal voltage detection means for detecting a voltage level of an internal voltage; a clock oscillation means for outputting a charge pumping clock signal; an internal voltage control means for controlling the clock oscillation means to be performed selectively in accordance with a data access mode or a non-data access mode; and a charge pumping means for outputting the internal voltage required for internal operation by pumping charges in response to the charge pumping clock signal.

Claims

1. A voltage supplier of a semiconductor memory device, comprising:

a clock transferring block for receiving and transferring an external clock;

a control signal generator for generating a control signal;

a charge pumping unit for generating an internal voltage required for an internal operation by pumping charges in response to a clock signal; and

a clock oscillation unit for generating the clock signal or outputting the external clock as the clock signal according to the control signal,

wherein the clock transferring block includes;

a frequency divider for dividing the external clock by a predetermined period;

a clock transferring unit for transferring the external clock in responses to an operation signal; and

a clock signal output unit for outputting one of the output signal of the frequency divider and the output signal of the clock transferring unit into the charge pumping unit in response to the control signal.

2. The voltage supplier of claim 1, wherein the control signal is activated in accordance with a data access mode or a non-data access mode.

3. The voltage supplier of claim 1, wherein the control signal is activated in accordance with one of an active command ACT, a read/write command and an auto refresh command.

4. The voltage supplier of claim 1, wherein the external clock has a period corresponding to an amount of current consumption required for a data access.

5. The voltage supplier of claim 1, further comprising an internal voltage detection means for detecting a voltage level of the internal voltage wherein the clock oscillation unit generates the clock signal according to according to the control signal and the detecting result.

6. The voltage supplier of claim 1, wherein the clock oscillation unit outputs the clock signal by receiving a first clock signal or a second clock signal, wherein the first clock signal is outputted as the clock signal in the non-data access mode and the second clock signal is outputted as the clock signal in the data access mode.

7. The voltage supplier of claim 6, wherein the data access mode is an operational period selected from a group consisting of an active command, a read/write command and an auto refresh command.

8. The voltage supplier of claim 6, wherein the non-data access mode is a period of a self refresh mode or a standby mode.

9. The voltage supplier of claim 1, wherein the predetermined period is corresponding to current consumed during the data access.

10. The voltage supplier of claim 1, wherein the clock oscillation unit includes:

a control signal transferring unit for transferring a detection signal, which is activated in response to the control signal to generate an enable signal;

a clock oscillation unit for generating the clock signal in response to the enable signal; and

a signal combination unit for outputting the clock signal generated by the clock oscillation unit or outputting the external signal as the clock signal.

11. The voltage supplier of claim 10, wherein the clock oscillation unit is configured with a ring oscillator.

12. The voltage supplier of claim 11, wherein the clock oscillation unit further includes a plurality of capacitors for adjusting an output load of each inverter in the closed loop circuit.

13. The voltage supplier of claim 1, further comprising a voltage clamping means for preventing the internal voltage from extremely being increased or decreased.