Buck-boost DC/DC converter with overlap control using ramp shift signal

• US 7,518,346 B2
• Filed: 03/02/2007
• Issued: 04/14/2009
• Est. Priority Date: 03/03/2006
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments Deutschland Gesellschaft Mit Beschrã¤Nkter Haftung (Texas Instruments, Inc.)
• Inventors: Prexl, Franz, Neuhaeusler, Juergen, Bayer, Erich
• Primary Examiner(s): Vu; Bao Q
• Application Number:
  US11/681,672
• Publication Number:
  US 20070210782A1
• Time in Patent Office: 774 Days
• Field of Search: 323/222, 323/282, 323/284, 323/285, 323/268, 323/270
• US Class Current: 323/222
• CPC Class Codes: H02M 3/1582 Buck-boost converters H02M3/1584 takes precedence

Abstract

A buck-boost DC/DC converter includes an inductor and a power stage having a set of switches selectively connecting the inductor between a voltage input, a voltage output and a reference level in accordance with buck or boost mode. The converter has a switch control providing control signals to the set of switches in the power stage. A comparator provides to the switch control a first pulse width modulation signal in buck mode and a second pulse width modulation signal in boost mode. A ramp generator provides to the comparator a first ramp signal for buck mode and a second ramp signal for boost mode. An overlap control provides a ramp shift signal to the ramp generator in response to a detection signal that indicates activity of the switches in the power stage. The ramp shift signal adjusts the first and second ramp signals relative to each other so as to minimize any gap and any overlap between the first and second ramp signals. Whenever actuation of all switches in the power stage within the same clock period is detected, the ramp signals are adjusted in a way to reduce the overlap between the ramp signals. Conversely, when no switch activity is detected in a clock period, the ramp signals are adjusted in a waye to increase the overlap between the ramp signals. As a result, when the input voltage is close to the output voltage, the converter alternatively operates in buck mode or in boost mode, avoiding a buck-boost mode.

Claims

1. A buck-boost DC-DC converter with an inductor and a power stage having a set of switches selectively connecting the inductor between a voltage input, a voltage output and a reference level in accordance with buck or boost mode, comprising:

a switch control providing control signals to the set of switches;

a comparator providing a first pulse width modulation signal to the switch control in buck mode and a second pulse width modulation signal to the switch control in boost mode;

a ramp generator providing a first ramp signal to the comparator for buck mode and a second ramp signal to the comparator for boost mode; and

an overlap control providing a ramp shift signal to the ramp generator in response to a detection signal that indicates activity of the set of switches in the power stage, wherein the ramp shift signal adjusts the first and second ramp signals relative to each other so as to minimize gap and overlap between the first and second ramp signals.

2. A converter as in claim 1, wherein the ramp generator includes current sources and capacitors for generating the ramp signals, and charge currents to the capacitors are modulated to increase or decrease the levels of the ramp signals.

3. A converter as in claim 2, wherein the level of the ramp signal for boost mode is shifted down to increase the overlap between the first and second ramp signals, and the level of the ramp signal for buck mode is shifted down to decrease the overlap between the first and second ramp signals.

4. A converter as in claim 2, wherein the ramp generator includes a current source that supplies a current proportional to the input voltage.

5. A converter as in claim 2, wherein the ramp generator includes a current source that supplies a current proportional to the output voltage.

6. A converter as in claim 2, wherein the ramp signal for buck mode has a rising slope and the ramp signal for boost mode has a falling slope.

7. A converter as in claim 6, wherein the ramp generator includes a current source that supplies a current proportional to the input voltage.

8. A converter as in claim 6, wherein the ramp generator includes a current source that supplies a current proportional to the output voltage.

9. A converter as in claim 3, wherein the level of the ramp signal for boost mode is shifted down to increase the overlap between the first and second ramp signals, and the level of the ramp signal for buck mode is shifted down to decrease the overlap between the first and second ramp signals.

10. A converter as in claim 9, wherein the ramp generator includes a current source that supplies a current proportional to the output voltage.

11. A converter as in claim 9, wherein the ramp generator includes a current source that supplies a current proportional to the input voltage.

12. A converter as in claim 11, wherein the ramp generator includes a current source that supplies a current proportional to the output voltage.

13. A converter as in claim 1, wherein the ramp signal for buck mode has a rising slope and the ramp signal for boost mode has a falling slope.

14. A converter as in claim 1, wherein the level of the ramp signal for boost mode is shifted down to increase the overlap between the first and second ramp signals, and the level of the ramp signal for buck mode is shifted down to decrease the overlap between the first and second ramp signals.