High fill ratio silicon spatial light modulator

• US 7,522,330 B2
• Filed: 06/05/2006
• Issued: 04/21/2009
• Est. Priority Date: 10/28/2005
• Status: Active Grant

• Current Assignee: Miradia Inc. (Walsin Lihwa Corporation)
• Original Assignee: Miradia Inc. (Walsin Lihwa Corporation)
• Inventors: Worley, William Spencer III, Wang, Yuxiang, Yang, Xiao, Wang, Ye, Ji, Wook, Chen, Dongmin, Woo, Howard, Payne, Justin Allen
• Primary Examiner(s): Dang; Hung X
• Assistant Examiner(s): Tra; Tuyen Q
• Application Number:
  US11/448,149
• Publication Number:
  US 20070097487A1
• Time in Patent Office: 1,051 Days
• Field of Search: 359/291, 359/292, 359/293, 359/295, 359/298, 359/220, 359/222, 359/223, 359/248, 359/254, 359/324, 359/290, 359/224, 359/322, 359/323
• US Class Current: 359/291
• CPC Class Codes: G02B 26/008 in the form of devices for effecting sequential colour changes, e.g. colour wheels
• CPC Class Codes: G02B 26/0841 the reflecting element being moved or deformed by electrostatic means

Abstract

An optical deflection device for a display application. The optical deflection device includes a semiconductor substrate including an upper surface region and one or more electrode devices provided overlying the upper surface region. The optical deflection device also includes a hinge device including a silicon material and coupled to the upper surface region. The optical deflection device further includes a spacing defined between the upper surface region and the hinge device and a mirror structure including a post portion coupled to the hinge device and a mirror plate portion coupled to the post portion and overlying the hinge device.

Claims

1. An optical deflection device for a display application, the optical deflection device comprising:

a semiconductor substrate comprising an upper surface region;

one or more electrode devices provided overlying the upper surface region;

a bias structure coupled to the upper surface region;

an insulating layer coupled to the bias structure and extending a predetermined distance from the upper surface region;

a hinge device comprising a silicon material, wherein the hinge device is coupled to the upper surface region and to the insulating layer;

a via plug passing through a via defined in the insulating layer between the bias structure and the hinge device;

a spacing defined between the upper surface region and the hinge device; and

a mirror structure comprising;

a post portion coupled to the hinge device, and

a mirror plate portion coupled to the post portion and overlying the hinge device.

2. The optical deflection device of claim 1 wherein the silicon material comprises single crystal silicon.

3. The optical deflection device of claim 1 further comprising a reflective layer overlying a portion of the mirror structure.

4. The optical deflection device of claim 3 wherein the reflective layer comprises a composite Ti/Al layer.

5. The optical deflection device of claim 1 wherein the mirror structure comprises a polished surface adapted to reflect incident radiation.

6. The optical deflection device of claim 1 wherein the mirror structure comprises a surface characterized by a surface roughness, the surface roughness being less than or equal to about 25 Å

RMS.

7. The optical deflection device of claim 1 wherein the semiconductor substrate comprises a CMOS substrate.

8. The optical deflection device of claim 1 wherein the one or more electrode devices comprise a multi-level electrode including a first layer coupled to the semiconductor substrate and a second layer coupled to the first layer and extending to a predetermined height from the substrate.

9. The optical deflection device of claim 8 wherein the second layer and the hinge device are fabricated from a single piece of material.

10. The optical deflection device of claim 9 wherein the single piece of material is a single crystal silicon layer.

11. The optical deflection device of claim 1 wherein the mirror structure comprises a silicon material.

12. The optical deflection device of claim 11 wherein the silicon material of the mirror structure comprises amorphous silicon.

13. The optical deflection device of claim 11 wherein the silicon material of the mirror structure comprises a polysilicon layer.

14. The optical deflection device of claim 11 wherein the silicon material of the mirror structure comprises a silicon/metal alloy.

15. The optical deflection device of claim 14 wherein silicon/metal alloy comprises a silicon/Al alloy.

16. The optical deflection device of claim 1 wherein the mirror structure comprises a metal material.

17. The optical deflection device of claim 16 wherein the metal material of the mirror structure comprises tungsten.

18. The optical deflection device of claim 1 wherein the hinge device is adapted to allow the mirror structure to move from a first region to a second region.

19. The optical deflection device of claim 18 wherein the first region is associated with a position at which the mirror structure is tilted at an angle of about 15°

and the second region is associated with a position at which the mirror structure is titled at an angle of about −

15°

.

20. The optical deflection device of claim 1 further comprising one or more landing structures coupled to the semiconductor substrate and adapted to arrest a motion of the mirror structure.

21. The optical deflection device of claim 20 wherein the motion of the mirror structure is arrested at an angle of about 15°

and at an angle of about −

15°

.

22. A spatial light modulator for display applications comprising:

a semiconductor substrate comprising an upper surface region;

one or more multi-level electrode devices provided overlying the upper surface region, wherein the one or more multi-level electrode devices comprise a first level and a second level;

an insulating layer overlying the first level of the one or more multi-level electrode devices;

a hinge device coupled to the insulating layer, wherein the hinge device comprises a silicon material and is coplanar with the second level of the one or more multi-level electrode devices;

a first spacing defined between the semiconductor substrate and the hinge device;

a mirror structure comprising a silicon material, the mirror structure overlying a portion of the hinge device and adapted to move from a first position to a second position;

a second spacing defined between the first level of the one or more multi-level electrode devices and the mirror structure; and

a third spacing defined between the second level of the one or more multi-level electrode devices and the mirror structure.

23. The spatial light modulator of claim 22 further comprising a first set of vias providing electrical connectivity between the first level of the one or more multi-level electrode devices and the second level of the one or more multi-level electrode devices.

24. The spatial light modulator of claim 22 further comprising a second set of vias providing electrical connectivity between a bias structure coupled to the semiconductor substrate and the hinge device.

25. The spatial light modulator of claim 22 wherein the insulating layer comprises an HDP oxide layer.

26. The spatial light modulator of claim 22 wherein the first spacing provides an open region for the hinge device to rotate in response to electrical signals provided by the one or more multi-level electrode devices.

27. The spatial light modulator of claim 22 wherein the second spacing and the third spacing provide open regions for the mirror structure to rotate in response to electrical signals provided by the one or more multi-level electrode devices.

28. The spatial light modulator of claim 22 further comprising one or more landing structures coupled to the semiconductor substrate and adapted to contact the mirror structure in at least one of the first position or the second position.

29. The spatial light modulator of claim 28 wherein an upper portion of the one or more landing structures comprises a layer coplanar with the hinge device.

30. The spatial light modulator of claim 22 wherein the silicon material of the mirror structure comprises amorphous silicon.

31. The spatial light modulator of claim 22 wherein the silicon material of the mirror structure comprises a polysilicon layer.

32. The spatial light modulator of claim 22 wherein the silicon material of the mirror structure comprises a silicon/metal alloy.

33. The spatial light modulator of claim 32 wherein silicon/metal alloy comprises a silicon/Al alloy.

34. The spatial light modulator of claim 22 wherein the silicon material of the hinge structure comprises single crystal silicon.

35. The spatial light modulator of claim 22 wherein the first position is characterized by a first angle of rotation of about 15°

and the second position is characterized by a second angle of rotation of about −

15°

.

36. An array of optical deflection devices for a display application, the array comprising:

a semiconductor substrate comprising;

a plurality of electrode devices disposed in array form as an array of cells,

a bias structure coupled to the semiconductor substrate, and

a bonding region;

an insulating layer overlying a portion of the bias structure and extending a predetermined distance from the bias structure along a normal to the semiconductor substrate;

a plurality of hinge devices including silicon material, each of the plurality of hinge devices comprising a bonding portion and a deposition interface, wherein the bonding portion of the plurality of hinge devices is bonded to a portion of the bonding region of the semiconductor substrate and the plurality of hinge devices are coupled to the insulating layer;

a set of via plugs providing electrical connectivity between the bias structure and the plurality of hinge devices;

a spacing defined between the plurality of electrode devices and the plurality of hinge devices; and

a plurality of mirror structures, each of the plurality of mirror structures comprising;

a post region coupled to the deposition interface of the plurality of hinge devices, and

a mirror plate overlying a cell of the array of cells of the plurality of electrode devices.

37. The array of optical deflection devices of claim 36 wherein the plurality of electrode devices comprise a plurality of multi-level electrode devices.

38. The array of optical deflection devices of claim 37 further comprising a second set of via plugs providing electrical connectivity between a first level of the plurality of multi-level electrode devices and a second level of the plurality of multi-level electrode devices.

39. The array of optical deflection devices of claim 36 further comprising a plurality of landing structures disposed in array form as an array of cells and coupled to the semiconductor substrate.

40. The array of optical deflection devices of claim 39 wherein the plurality of landing structures are adapted to arrest a motion of the plurality of mirror structures.

41. The array of optical deflection devices of claim 39 further comprising a plurality of multi-level electrode devices, wherein the plurality of landing structures comprise a layer that is coplanar with a level of the plurality of multi-level electrode devices.

42. The array of optical deflection devices of claim 36 wherein the plurality of hinge devices comprise a single crystal silicon material.

43. The array of optical deflection devices of claim 36 wherein the plurality of mirror structures comprise a silicon material.

44. The array of optical deflection devices of claim 43 wherein the silicon material of the plurality of mirror structures comprises an amorphous silicon material.

45. The array of optical deflection devices of claim 36 wherein the plurality of mirror structures comprise a metal mirror material.

46. The array of optical deflection devices of claim 36 wherein the spacing provides an open region adapted to receive a portion of each of the plurality of hinge devices during a rotation of each of the plurality of hinge devices.

47. The array of optical deflection devices of claim 46 wherein rotation of each of the plurality of hinge devices occurs in response to electrical signals provided by the plurality of electrode devices.

48. The array of optical deflection devices of claim 36 wherein the insulating layer comprises an HDP oxide layer.

49. The array of optical deflection device of claim 36 wherein the semiconductor substrate comprises a CMOS substrate.

50. The array of optical deflection device of claim 36 wherein each of the silicon mirror structures is adapted to move from a first position characterized by a rotation angle of about 15°

to a second position characterized by a rotation angle of about −

15°

.

51. The array of optical deflection device of claim 36 wherein the bonding region of the semiconductor substrate is characterized by a global planarity defined by a substrate bow of about 100 μ

m over an 8″

semiconductor substrate.

52. The array of optical deflection device of claim 36 wherein the bonding region of the semiconductor substrate is characterized by a die planarity of about 5,000 Å

.

53. The array of optical deflection device of claim 36 wherein the array of cells is characterized by a pitch of less than or equal to about 10.8 μ

m.

54. The array of optical deflection device of claim 53 wherein the array of cells is characterized by a pitch of less than or equal to about 9.0 μ

m.

55. The array of optical deflection device of claim 36 wherein the array of cells is characterized by a high density array dimension of up to 1920 by 1080.

56. A micro-mirror for display applications, the micro-mirror comprising:

a semiconductor substrate comprising an electrode device layer and a bonding region characterized by a local micro-roughness of less than 5 Å

over a 2 μ

m by 2 μ

m scan area;

an insulating layer extending to a first predetermined distance from the semiconductor substrate;

a hinge device comprising silicon material bonded to the bonding region of the semiconductor substrate, wherein the hinge device comprises a deposition interface opposing the bonding region of the semiconductor substrate and is coupled to the insulating layer;

a mirror post coupled to the deposition interface and extending to a second predetermined distance from the semiconductor substrate; and

a mirror plate coupled to the mirror post and overlying the electrode device layer.

57. The micro-mirror of claim 56 wherein the hinge device comprises a single crystal silicon material.

58. The micro-mirror of claim 56 wherein the mirror post comprises a silicon material.

59. The micro-mirror of claim 58 wherein the silicon material comprises amorphous silicon.

60. The micro-mirror of claim 56 further comprising an adhesion layer disposed between the hinge device and the mirror post.

61. The micro-mirror of claim 60 wherein the adhesion layer comprises titanium.

62. The micro-mirror of claim 56 wherein the hinge device is characterized by a torsional stiffness from about 40 μ

N-μ

m to about 100 μ

N-μ

m.

63. The micro-mirror of claim 56 wherein the mirror plate is characterized by a perimeter of less than 80 μ

m.

64. A multi-layer semiconductor structure for fabricating a spatial light modulator, the multi-layer semiconductor structure comprising:

a semiconductor substrate comprising a plurality of bias electrode devices and a plurality of activation electrode devices;

an oxide layer coupled to the semiconductor substrate, the oxide layer comprising a first and a second bonding interface and extending to a predetermined height from the semiconductor substrate, wherein the oxide layer further comprises a first portion extending from a first one of the plurality of activation electrode devices to the first bonding interface and a second portion extending from a second one of the plurality of activation electrode devices to the second bonding interface thereby forming an oxide free region adjacent one of the plurality of bias electrode devices and between the first portion and the second portion; and

a silicon layer bonded to the bonding interface of the oxide layer.

65. The multi-layer semiconductor structure of claim 64 wherein the plurality of bias electrodes carry a bias voltage and the plurality of activation electrodes carry an addressing voltage.

66. The multi-layer semiconductor structure of claim 64 wherein the bonding region of the semiconductor substrate is characterized by a local micro-roughness of less than 5 Å

over a 2 μ

m by 2 μ

m scan area.

67. The multi-layer semiconductor structure of claim 64 wherein the bonding interface is characterized by a global planarity defined by a substrate bow of about 100 μ

m or less over an 8″

semiconductor substrate.

68. The multi-layer semiconductor structure of claim 64 wherein the oxide layer comprises a silicon oxide layer.

69. The multi-layer semiconductor structure of claim 68 wherein the silicon oxide layer comprises an HDP oxide layer.

70. The multi-layer semiconductor structure of claim 64 wherein the silicon layer comprises a single crystal silicon layer.