Minimum memory operating voltage technique

• US 7,523,373 B2
• Filed: 08/30/2006
• Issued: 04/21/2009
• Est. Priority Date: 08/30/2006
• Status: Active Grant

• Current Assignee: VLSI Technology LLC (SoftBank Group Corp.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Bearden, David R., Russell, Andrew C., Zhang, Shayan, Hunter, Bradford L.
• Primary Examiner(s): Britt; Cynthia
• Assistant Examiner(s): NGUYEN, STEVE N
• Application Number:
  US11/468,458
• Publication Number:
  US 20080082873A1
• Time in Patent Office: 965 Days
• Field of Search: 714/745, 714/721
• US Class Current: 714/745
• CPC Class Codes: G11C 2029/5004 Voltage
• CPC Class Codes: G11C 29/02 Detection or location of defective auxiliary circuits, e.g. defective refresh counters
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50 Marginal testing, e.g. race, voltage or current testing
• CPC Class Codes: G11C 29/50016 of retention
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence

Abstract

A method includes an integrated circuit with a memory. The memory operates with an operating voltage. A value of a minimum operating voltage of the memory is determined. The value of the minimum operating voltage is stored in a non-volatile memory location that maybe a non-volatile register. This minimum operating voltage information can then be used in determining when an alternative power supply voltage may be switched to the memory or ensuring that the minimum voltage is otherwise met. The minimum voltage can be used only internal to the integrated circuit or also provided externally to a user.

Claims

1. A method, comprising:

providing an integrated circuit with a memory;

operating the memory with an operating voltage;

determining a value of a minimum operating voltage of the memory;

providing a non-volatile memory (NVM) location;

storing the value of the minimum operating voltage of the memory in the NVM location;

providing a functional circuit on the integrated circuit exclusive of the memory;

providing a first regulated voltage to the functional circuit;

providing a second regulated voltage, the second regulated voltage is greater than the first regulated voltage;

providing the first regulated voltage as the operating voltage of the memory when the first regulated voltage is at least the value of the minimum operating voltage; and

providing the second regulated voltage as the operating voltage of the memory when the first regulated voltage is less than the value of the minimum operating voltage, wherein while the second regulated voltage is provided as the operating voltage of the memory, the first regulated voltage is provided to the functional circuit.

2. The method of claim 1, wherein the step of testing the memory is further characterized by the minimum operating voltage comprising one of a group consisting of minimum write voltage, minimum read voltage, and a minimum standby voltage.

3. The method of claim 1, wherein the step of providing the integrated circuit with the memory is further characterized by the memory comprising one of a group consisting of dynamic random access memory and static random access memory.

4. The method of claim 1, wherein the step of providing the NVM location is further characterized by the NVM location comprising a non-volatile register.

5. The method of claim 1, further comprising:

providing a signal in response to a desired value for the first regulated voltage being below the minimum operating voltage.

6. The method of claim 1, further comprising:

providing a controller on the integrated circuit that selects an operating value for the operating voltage of the memory; and

providing the operating voltage to the memory at a value at least as great as the minimum operating voltage in response to the operating value selected by the processor being below the minimum operating voltage.

7. The method of claim 1, further comprising providing the value of the minimum operating voltage external to the integrated circuit.

8. The method of claim 1, wherein the step of determining is further characterized as performing a test applied externally from the integrated circuit.

9. An integrated circuit, comprising:

a memory that operates using an operating voltage, wherein the memory is characterized as having a minimum operating voltage;

a memory location that stores a value representative of the minimum operating voltage;

a first voltage regulator for supplying a first regulated voltage;

a circuit that provides a function and uses the first regulated voltage;

a second voltage regulator for supplying a second regulated voltage, wherein the second regulated voltage is greater than the first regulated voltage; and

a power supply selector that supplies the first regulated voltage as the operating voltage of the memory when the first regulated voltage is at least the minimum operating voltage and supplies the second regulated voltage as the operating voltage when the first regulated voltage is below the minimum operating voltage, wherein while the second regulated voltage is supplied as the operating voltage, the circuit uses the first regulated voltage.

10. The integrated circuit of claim 9, wherein the circuit that provides a function comprises a processor, further comprising:

a built-in self test (BIST) circuit, coupled to the processor, which determines the minimum operating voltage.

11. The memory of claim 9, wherein the minimum operating voltage comprises one of a group consisting of minimum retention voltage, minimum read voltage, minimum write voltage, and minimum standby voltage.

12. The memory of claim 11, wherein the minimum operating voltage comprises another one of the group consisting of minimum retention voltage, minimum read voltage, minimum write voltage, and minimum standby voltage.

13. The memory of claim 9, wherein the memory comprises one of a group consisting of a static random access memory and a dynamic random access memory.

14. The memory of claim 9, further comprising:

a processor that selects an operating value for the operating voltage of the memory; and

means for providing the operating voltage to the memory at a value at least as great as the minimum operating voltage in response to the operating value selected by the processor being below the minimum operating voltage.

15. The memory of claim 9, wherein the memory location is characterized as being a non-volatile register.

16. A method, comprising:

providing an integrated circuit with a memory that uses an operating voltage;

testing the memory to determine the operating voltage of the memory that is a minimum operating voltage;

storing, in a non-volatile manner, the value of the minimum operating voltage;

providing a functional circuit on the integrated circuit exclusive of the memory;

providing a first regulated voltage to the functional circuit;

providing a second regulated voltage, wherein the second regulated voltage is greater than the first regulated voltage;

providing the first regulated voltage as the operating voltage of the memory when the first regulated voltage is at least the value of the minimum operating voltage; and

providing the second regulated voltage as the operating voltage of the memory when the first regulated voltage is less than the value of the minimum operating voltage, wherein while the second regulated voltage is provided as the operating voltage of the memory, the first regulated voltage is provided to the functional circuit.