Dual port serial advanced technology attachment (SATA) disk drive

• US 7,526,587 B2
• Filed: 11/12/2004
• Issued: 04/28/2009
• Est. Priority Date: 02/09/2004
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Nemazie, Sam, Chong, Andrew Hyonil
• Primary Examiner(s): Kindred; Alford W
• Assistant Examiner(s): Lee; Chun-Kuan
• Application Number:
  US10/986,732
• Publication Number:
  US 20050186832A1
• Time in Patent Office: 1,628 Days
• Field of Search: 710/31, 710/51, 710/54, 710/74, 710/71, 710/52, 710/56, 370351-430, 370/229, 370/230
• US Class Current: 710/74
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence

Abstract

A hard disk drive is coupled to a plurality of host units for communication. The first host unit includes a serial advanced technology attachment (SATA) port, including a first host task file coupled for access to the device and responsive to commands sent by the first host unit. The second host unit includes a SATA port, including a second task file, coupled for access to the device and responsive to commands sent by the second host unit. An arbitration and control circuit is coupled to the first host task file and second task file. The arbitration and control circuit selects commands from one or the other host units when either host units sends a command for execution for concurrently accessing the device, and accepts commands from both, at any given time, including when the device is not idle.

Claims

1. A dual port serial advanced technology attachment (SATA) hard disk drive coupled to a plurality of host units for communicating thereto and comprising:

a) a switch including a first SATA port, a second SATA port, and a third SATA port, wherein the third SATA port includes a device task file coupled to a head drive assembly (HDA);

b) the first SATA port, including a first host task file, and coupled to a first host unit, for accessing, by the first host unit, to the HDA, the first host task file being responsive to commands sent by the first host unit;

c) the second SATA port, including a second host task file, and coupled to a second host unit, for accessing by the second host unit, to the HDA, the second host task file responsive to commands sent by the second host unit, the HDA supports queuing of the commands sent by the first and second host units and generates an original queue depth value indicative of a number of commands that the HDA can queue from either of the first or second host units; and

d) an arbitration and control circuit coupled to said first host task file and said second host task file for selecting the commands from one of the first host or second host units whenever either one of the first or second host units sends the corresponding commands for execution thereof for concurrently accessing the HDA by accepting the corresponding commands from either of the first or second host units, at any given time, including when the HDA is not in an idle state, the arbitration and control circuit being responsive to the original queue depth value and alters the original queue depth value to be a new queue depth value that is less than the original queue depth value so that each of the first and second host units is assigned a new number of commands that is less than the number of commands indicated by the original queue depth value but that a total number of commands queued by the first and second host units remains the same as the original queue depth value thereby misrepresenting the original queue depth value to the first and second host units to be less than the original queue depth value thereby preventing the commands sent by the first and second host units from being lost by an overrun of the original queue depth value by either of the first or second host units.

2. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 1 wherein said first and second SATA ports are level 4 ports.

3. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 1 wherein said arbitration and control circuit causes concurrent access of the dual port SATA hard disk drive by the first and second host units.

4. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 1

wherein the arbitration and control circuit includes a Tag/Sactive Mapping Circuit for mapping the commands sent by the first and second host units to a device tag and inverse mapping of the device tag to either the command sent by the first or the second host units for identifying either the first or second host unit and the associated commands sent by the first or the second host unit.

5. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 1 wherein either the first or the second host units sends a legacy queue command.

6. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 1 wherein either the first or the second host units sends a native queue command for execution thereof.

36. A switch, as recited in claim 1, wherein the new queue depth value reported to each of the first and second host units is no more than half of the original queue depth value.

37. A switch, as recited in claim 1, wherein in response to an identify drive command from either of the first or second host units, the arbitration and control circuit configured to intercept an identify drive response, which is generated by the device in response to the identify drive command, and to replace the original queue depth value with the new queue depth value that is no more than one-half of the original queue depth value that was reported by the device.

7. A method of communications between a dual port serial advanced technology attachment (SATA) hard disk drive and a plurality of host units comprising:

a) coupling a first SATA port, having a first host task file, to a first host unit, the first host task file for receiving commands, from the first host unit, that are intended for a head drive assembly (HDA);

b) coupling a second SATA port, having a second host task file, to a second host unit, the second host task file for receiving commands, from the second host unit, that are intended for the HDA;

c) storing commands received from the first host unit in the first host task file;

d) storing commands received from the second host unit in the second host task file;

e) storing the commands received from either the first or second host units in a device task file of a third SATA port which is coupled to the HDA;

f) selecting the commands from one of the first host or second host units whenever either one of the first or second host units sends the correspond commands for execution thereof for concurrently accessing the HDA by accepting the correspond commands from either of the first or second host units, at any given time, including when the HDA is not in an idle state;

g) intercepting by an arbitration and control unit an original queue depth value generated by the HDA, the queue depth value being indicative of a number of commands that the HDA can queue from either of the first or second host units; and

h) altering the original queue depth value by the arbitration and control unit to be a new queue depth value that is less than the original queue depth value so that each of the first and second host units is assigned a new number of commands that is less than the number of commands indicated by the original queue depth value but that a total number of commands queued by the first and second host units is the same as the original queue depth value thereby misrepresenting the original queue depth value to the first and second host units to be less than the original queue depth value thereby preventing the commands sent by the first and second host units from being lost by an overrun of the original queue depth value by either of the first or second host units.

8. A dual port serial advanced technology attachment (SATA) hard disk drive comprising:

a) a SATA switch including a first SATA port, a second SATA port, and a third SATA port, wherein the third SATA port includes a device task file coupled to a head drive assembly (HDA);

b) the first SATA port, including a first host task file, for connection to a first host unit, the first host task file responsive to commands sent by the first host unit intended for the HDA;

c) the second SATA port, including a second host task file, for connection to a second host unit, the second host task file responsive to commands sent by the second host unit intended for the HDA, the HDA supports queuing of the commands sent by the first and second host units and generates an original queue depth value indicative of a number of commands that the HDA can queue from either of the first or second host units; and

d) an arbitration and control circuit coupled to said first host task file and said second host task file for selecting the commands sent by either the first host unit or the second host unit for execution by the HDA for concurrently accessing the HDA by accepting the commands from either of the first or second host units, at any given time, including when the HDA is not in an idle state,

wherein while one of the first or second host units is coupled to the dual port SATA hard disk drive, the other one of the first or second host units sends the commands to the dual port SATA hard disk drive for execution thereof, the arbitration and control circuit responsive to the original queue depth value and alters the original queue depth value to be a new queue depth value that is less than the original queue depth value so that each of the first and second host units is assigned a new number of commands that is less than the number of commands indicated by the original queue depth value but that a total number of commands queued by the first and second host units remains the same as the original queue depth value thereby misrepresenting the original queue depth value to the first and second host units to be less than the oriqinal queue depth value thereby preventing the commands sent by the first and second host units from being lost by an overrun of the original queue depth value by either of the first or second host units.

9. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 8 wherein said arbitration and control causes the concurrent access of the dual port SATA hard disk drive by the first and second host units.

10. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 8 wherein information, in form of data, commands or setup, is transferred from the HDA to the first or second host units through the SATA switch and the information is modified by the SATA switch prior to being received by the first or second host units such that modified information rather than the information is received by the first or second host units.

11. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 8 wherein the information is referred to as “

TAG”

.

12. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 11 wherein the information is referred to as ‘

identity drive response’

.

13. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 8 wherein information, in form of data, commands or setup, is transferred from the first or second host units to the HDA through the SATA switch and the information is modified by the SATA switch prior to being received by the HDA such that modified information rather than the information is received by the HDA.

14. A network device coupled between at least two host units and a device for communication there between comprising:

a. a first serial advanced technology attachment (SATA) port for coupling to a first host unit and including a first host task file responsive to commands from the first host unit;

b. a second SATA port for coupling to a second host unit and including a second host task file responsive to commands from the second host unit;

c. a third SATA port for coupling to the device, the device supports queuing of the commands sent by the first and second host units and generates an original queue depth value indicative of a number of commands that the device can queue from either of the first or second host units; and

d. an arbitration and control circuit coupled to said first host task file and said second host task file for selecting the commands sent by either the first host unit or the second host unit for execution by the device for concurrently accessing the device by accepting the commands from either of the first or second host units, at any given time, including when the device is not in an idle state,

wherein either one of the first and second host task files queues the commands sent by the first and second host units to the network device for execution thereof, the arbitration and control circuit responsive to the original queue depth value and alters the original queue depth value to be a new queue depth value that is less than the original queue depth value so that each of the first and second host units is assigned a new number of commands that is less than the number of commands indicated by the original queue depth value but that a total number of commands queued by the first and second host units remains the same as the original queue depth value thereby misrepresenting the original queue depth value to the first and second host units to be less than the original queue depth value thereby preventing the commands sent by the first and second host units from being lost by an overrun of the original queue depth value by either of the first or second host units.

15. A network device as recited in claim 14

wherein the network device is an intelligent switch capable of protocol conversion to SATA protocol.

16. A network device as recited in claim 15 wherein the network device is a bridge.

17. A network device recited in claim 14

wherein the arbitration and control circuit includes a Mapping Circuit for mapping the commands sent by the first and second host units to a device tag and inverse mapping of the device tag for identifying either one of the first or second host units.

18. A method of communication between at least two host units and a device, through a network device, comprising:

a. coupling a first serial advanced technology attachment (SATA) port to a first host unit, said first SATA port including a first host task file responsive to commands from the first host unit that are intended for the device;

b. coupling a second SATA port to a second host unit, said second SATA port including a second host task file responsive to commands from the second host unit that are intended for the device;

c. coupling a third SATA port to the device;

d. receiving the commands from the first and second host units;

e. storing the commands received from the first host unit into the first host task file;

f. storing the commands received from the second host unit into the second host task file;

g. selecting the commands sent by either the first host unit or the second host unit for execution by the device for concurrently accessing the device by accepting the commands from either of the first or second host units, at any given time, including when the device is not in an idle state, wherein either one of the first and second host task files queues the commands sent by the first and second host units to the network device for execution thereof;

h) intercepting by an arbitration and control unit an original queue depth value generated by the device, the queue depth value being indicative of a number of commands that the device can queue from either of the first or second host units; and

i) altering the original queue depth value by an arbitration and control unit to be a new queue depth value that is less than the original queue depth value so that each of the first and second host units is assigned a new number of commands that is less than the number of commands indicated by the original queue depth value but that a total number of commands queued by the first and second host units is the same as the original queue depth value thereby misrepresenting the original queue depth value to the first and second host units to be less than the original queue depth value thereby preventing the commands sent by the first and second host units from being lost by an overrun of the original queue depth value by either of the first or second host units.

19. A dual port serial advanced technology attachment (SATA) hard disk coupled to a plurality of host units for communicating thereto and comprising:

a switch including;

a) a first SATA port for coupling the dual port SATA hard disk drive to a first host unit, said first SATA port including a first host task file responsive to commands from the first host unit intended for a head drive assembly (HDA);

b) a second SATA port for coupling the dual port SATA hard disk drive to a second host unit, said second SATA port including a second host task file responsive to commands from the second host unit intended for the HDA;

c) a third SATA port including a device task file for coupling to the HAD, for accessing by the first or second host units, the HDA supports queuing of the commands sent by the first and second host units and generates an original queue depth value indicative of a number of commands that the HDA can queue from either of the first or second host units; and

d) an arbitration and control circuit coupled to said first host task file and said second host task file for selecting the commands sent by one of the first host or second host units for execution thereof, the arbitration and control circuit for concurrently accessing the dual port SATA hard disk drive by accepting the commands from either of the first or second host units, at any given time, including when the device is not in an idle state, the arbitration and control circuit responsive to the original queue depth value and alters the original queue depth value to be a new queue depth value that is less than the original queue depth value so that each of the first and second host units is assigned a new number of commands that is less than the number of commands indicated by the original queue depth value but that a total number of commands queued by the first and second host units remains the same as the original queue depth value thereby misrepresenting the original queue depth value to the first and second host units to be less than the original queue depth value thereby preventing the commands sent by the first and second host units from being lost by an overrun of the original queue depth value by either of the first or second host units.

20. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 further including a disk drive controller wherein the disk drive controller includes a SATA interface coupled to the switch.

21. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 wherein said first, second, and third SATA ports are level 4 ports.

22. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 wherein said arbitration and control circuit causes concurrent access of the dual port SATA hard disk drive by the first and second host units.

23. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 wherein information, in form of data, commands or setup, is transferred to the first or second host units through the switch and the information is modified by the switch prior to being received by the first or second host units such that modified information is received by the first or second host units.

24. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 23 wherein the information is referred to as ‘

identify drive response’

.

25. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 23 wherein the information is referred to as ‘

Tag’

.

26. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 wherein information, in form of data, commands or setup, is transferred from the first or second host units through the switch and the information is modified by the switch such that modified information rather than the information is received by the disk drive controller.

27. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 26 wherein the information is referred to as ‘

Tag’

.

28. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 wherein the arbitration and control circuit includes a Tag/Sactive Mapping Circuit for mapping a host tag to a device tag and inverse mapping for identifying either the first or second host unit.

29. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 wherein either the first or the second host units sends a legacy queue command.

30. A dual port serial advanced technology attachment (SATA) hard disk drive as recited in claim 19 wherein either the first or the second host units send a native queue command for execution thereof.

31. An active switch coupled between a plurality of host units and a device for communicating there between and comprising:

a first serial advanced technology attachment (SATA) port having a first command queuing circuit for queuing commands, associated with a first host units, the commands intended for a device;

a second SATA port having a second command queuing circuit for queuing commands associated with a second host units, the commands intended for the device;

a third SATA port having a device task file, coupled to the device, for accessing by the first or second host units, the device supports the queuing of command sent by the first and second host units and generates an original queue depth value indicative of a number of commands that the device can queue from either of the first or second host units; and

an arbitration and control circuit coupled to said first host unit and said second host unit for selecting the commands sent by either the first host unit or the second host unit for execution by the device, the arbitration and control circuit for concurrently accessing the device by accepting the commands from either of the first or second host units, at any given time, including when the device is not in an idle state, the arbitration and control circuit responsive to the original queue depth value and alters the original queue depth value to be a new queue depth value that is less than the original queue depth value so that each of the first and second host units is assigned a new number of commands that is less than the number of commands indicated by the original queue depth value but that a total number of commands queued by the first and second host units remains the same as the original queue depth value thereby misrepresenting the original queue depth value to the first and second host units to be less than the original queue depth value thereby preventing the commands sent by the first and second host units from being lost by an overrun of the original queue depth value by either of the first or second host units.

32. An active switch as recited in claim 31 wherein the device causes execution of native queue commands, the native queue commands having associated therewith a device tag.

33. An active switch as recited in claim 32 wherein the device tag values are partitioned into a first range for the first host unit and a second range for the second host unit.

34. An active switch as recited in claim 33 wherein the device tag values are dynamically assigned to the first and second host units.

35. An active switch as recited in claim 34 wherein the first and second command queue circuits have associated therewith the new queue depth value reported as either a first or second host queue depth value.