Memory subsystem voltage control and method that reprograms a preferred operating voltage

• US 7,529,951 B2
• Filed: 02/08/2006
• Issued: 05/05/2009
• Est. Priority Date: 03/04/2003
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Schnepper, Randy L.
• Primary Examiner(s): Lee; Thomas
• Assistant Examiner(s): WANG, ALBERT C
• Application Number:
  US11/350,961
• Publication Number:
  US 20060129853A1
• Time in Patent Office: 1,182 Days
• Field of Search: 713/300, 711/105
• US Class Current: 713/300
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/263 Arrangements for using multiple switchable power supplies, e.g. battery and AC G06F1/30 takes precedence
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: G11C 5/14 Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels

Abstract

A method and apparatus for providing a preferred operating voltage to a memory device as specified by a stored configuration parameter. The apparatus includes a nonvolatile memory configured to store a preferred memory device voltage configuration corresponding to a preferred operating voltage of the memory device. The preferred memory device voltage configuration is readable by a host and the circuit is responsive to a command to modify the voltage to the memory device in accordance with the preferred memory device configuration. The voltage to the memory device is modified for improved performance and compatibility of the memory device with a host system.

Claims

1. A method for testing an operational range of a memory module, comprising:

storing a first memory device voltage configuration within a nonvolatile memory on the memory module, the first memory device voltage configuration identifying a first testing voltage of at least one memory device resident on the memory module;

reading the first memory device voltage configuration from the nonvolatile memory;

generating, in response to the first memory device voltage configuration, a power bias to adjust voltage provided to the at least one memory device of the memory module to the first testing voltage; and

reprogramming the nonvolatile memory with a preferred memory device voltage configuration identifying a preferred operating voltage of the at least one memory device.

2. The method, as recited in claim 1, wherein generating comprises converting the first memory device voltage configuration into a command for generating a power bias and modifying voltage provided to the memory module to the first testing voltage.

3. The method, as recited in claim 1, wherein storing a first memory device voltage configuration further comprises storing the first memory device voltage configuration in an unused portion of a memory space defined according to the Joint Electronic Devices Engineering Counsel (JEDEC) standard.

4. The method, as recited in claim 1, wherein the nonvolatile memory is reprogrammable to store at least the first memory device voltage configuration to test the memory module and a preferred memory device voltage configuration as a result of testing.

5. A method for testing an operational range of a memory module, comprising:

storing a first memory device voltage configuration within a nonvolatile memory on the memory module, the first memory device voltage configuration identifying a first testing voltage of at least one memory device resident on the memory module;

generating, in response to the first memory device voltage configuration, a power bias to adjust voltage provided to the at least one memory device of the memory module to the first testing voltage; and

reprogramming the nonvolatile memory with a preferred memory device voltage configuration identifying a preferred operating voltage of the at least one memory device when the preferred memory device voltage configuration enables preferred performance of the at least one memory device over the first memory device voltage configuration.