Event signature apparatus, systems, and methods

• US 7,557,725 B2
• Filed: 09/30/2003
• Issued: 07/07/2009
• Est. Priority Date: 09/30/2003
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Kumar, Anil V., Shahidzadeh, Shahrokh, Douglas, Jonathan P.
• Primary Examiner(s): Lee; Benjamin C
• Assistant Examiner(s): Tang; Son M
• Application Number:
  US10/676,178
• Publication Number:
  US 20050068187A1
• Time in Patent Office: 2,107 Days
• Field of Search: 340/635, 340657-664, 324/759, 324/500, 324/523, 324/537, 324/755, 324/765, 324/771
• US Class Current: 340/653
• CPC Class Codes: G06F 11/0754 by exceeding limits
• CPC Class Codes: G06F 11/3037 where the computing system component is a memory, e.g. virtual memory, cache accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00
• CPC Class Codes: G06F 11/3058 Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations thermal management in cooling arrangements of a computing system G06F1/206

Abstract

An apparatus and a system, as well as a method and article, may operate to compare a circuit operational condition with a specified condition, to record an out-of-specification condition, and to determine some specified number of recorded out-of-specification conditions.

Claims

1. A method, comprising:

storing data corresponding to at least one input operating over-voltage condition occurring in an integrated circuit in an indelible memory;

determining a specified number of stored over-voltage conditions;

indicating the specified number of stored over-voltage conditions;

refraining from detecting the over-voltage input operating condition for a specified amount of time, and wherein the specified amount of time is associated with a power-on reset time.

2. A method, comprising:

comparing an input operational condition of an electronic circuit with a specified condition;

recording data corresponding to an out-of-specification input operating condition in an indelible memory; and

determining a specified number of recorded out-of-specification input operating conditions indicating the specified number of said out-of-specification conditions;

refraining from detecting the out-of-specification input operating condition for a specified amount of time, and wherein the specified amount of time is associated with a power-on reset time.

3. The method of claim 2, further comprising:

detecting the out-of-specification input operating condition as an input operating over-voltage condition.

4. The method of claim 2, wherein the specified condition comprises a recommended operational input voltage upper limit associated with an integrated circuit.

5. The method of claim 2, wherein the indelible memory comprises at least one fuse.

6. The method of claim 2, wherein determining the specified number of recorded out-of-specification input operating conditions further comprises:

reading a signature value stored in the indelible memory.

7. An article comprising a machine-accessible medium having associated data, wherein the data, when accessed, results in a machine performing:

comparing an input operational voltage of an electronic circuit with a specified voltage;

recording a value corresponding to an input operating over-voltage condition in an indelible memory;

determining a specified number of recorded input operating over-voltage conditions;

displaying said specified number of over-voltage conditions; and

recording a clock speed at the time of occurrence of the over-voltage input operation condition.

8. The article of claim 7, wherein the data, when accessed, results in the machine performing:

filtering the input operational voltage for at least a duration of one clock period.

9. The article of claim 7, wherein recording the value corresponding to the input operating over-voltage condition further comprises:

recording the value corresponding to the input operating over-voltage condition only if the input operational voltage is greater than the specified voltage by a selected amount.

10. The article of claim 9, wherein the selected amount is at least about two times greater than an expected noise voltage value.

11. The article of claim 7, wherein the data, when accessed, results in the machine performing:

verifying recordation of the value corresponding to the input operating over-voltage condition.

12. An apparatus, comprising:

an indelible memory to store information corresponding to a selected number of out-of-specification input operational conditions encountered by an electronic circuit;

a display for displaying said selected number of out-of-specification input operational conditions; and

a filter for refraining from detecting the out-of-specification input operating condition for a specified amount of time, wherein the specified of time is associated with a power-on reset time.

13. The apparatus of claim 12, further comprising:

a detection module coupled to the indelible memory to determine the existence of at least one of the selected number of out-of-specification input operational conditions.

14. The apparatus of claim 13, further comprising:

a filter module coupled to the detection module.

15. The apparatus of claim 12, wherein the indelible memory comprises a fuse.

16. The apparatus of claim 12, wherein at least one of the out-of-specification input operational conditions comprises an over-voltage condition.

17. A system, comprising:

an indelible memory to store data corresponding to a selected number of out-of-specification input operational conditions and a clock speed occurrence at the time of said conditions encountered by an electronic circuit; and

a display coupled to the electronic circuit to indicate said selected number.

18. The system of claim 17, wherein the electronic circuit comprises a microprocessor.

19. The system of claim 17, further comprising:

a logic module to detect each one of the selected number of out-of-specification input operational conditions.

20. The system of claim 19, wherein the logic module comprises an analog-to-digital converter.

21. The system of claim 17, further comprising:

a second memory to store data corresponding to a specified condition to be compared with an operational condition associated with the electronic circuit.

22. The system of claim 21, wherein the specified condition comprises a recommended operational input voltage upper limit associated with an integrated circuit.

23. The system of claim 22, wherein the integrated circuit comprises a microprocessor.

24. The system of claim 17, further comprising:

a basic input-output system to determine the selected number of out-of-specification input operational conditions.