Method and system for input voltage droop compensation in video/graphics front-ends

• US 7,570,181 B2
• Filed: 06/10/2007
• Issued: 08/04/2009
• Est. Priority Date: 06/09/2006
• Status: Active Grant

• Current Assignee: Cosmic Circuits Private Limited
• Original Assignee: Cosmic Circuits Private Limited
• Inventors: Srinivasan, C., Krishnan, Sundararajan
• Primary Examiner(s): Nguyen; Linh V
• Application Number:
  US11/760,780
• Publication Number:
  US 20070285299A1
• Time in Patent Office: 786 Days
• Field of Search: 341118-122, 341/143, 341/155, 341/172
• US Class Current: 341/118
• CPC Class Codes: H03M 1/0607 Offset or drift compensation removal of offset already present on the analogue input signal H03M1/1295
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence

Abstract

Methods and systems for input voltage droop compensation in video/graphics front-end systems. The method of an embodiment of the invention captures input voltage information supplied to an Analog-to-Digital Converter (ADC) operatively coupled to a bypass capacitor in a video/graphics front-end system; calculates a droop in the input voltage in ADC due to a charge sharing between an input sampling capacitor of the ADC and the bypass capacitor; and compensates for the value of the bypass capacitor using an output of the ADC. Embodiments of the invention provide an improved freedom in the choice of off-chip bypass capacitance in video/graphics front-end systems.

Claims

1. A method comprising:

capturing input voltage information to a circuit operatively coupled to a bypass capacitor in a video/graphics front-end system;

calculating a droop in said input voltage in said circuit operation due to a charge sharing between the circuit and said bypass capacitor; and

compensating for the value of the droop in the bypass capacitor using an output of the circuit.

2. The method of claim 1, wherein said capturing comprises:

capturing said input voltage information to a first stage operation of the circuit.

3. The method of claim 1, wherein said compensating comprises compensating a common mode voltage droop.

4. The method of claim 1, wherein said compensating comprises compensating a differential mode voltage droop.

5. The method of claim 1, wherein said compensating comprises:

performing a coarse compensation at the first stage of the circuit operation; and

performing a fine compensation using the output of the subsequent stages of the circuit operation.

6. The method of claim 1, wherein said circuit comprises a pipelined analog-to-digital converter.

7. The method of claim 1, wherein said circuit comprises a front-end amplifier.

8. A method comprising:

capturing input voltage information to an analog-to-digital converter operatively coupled to a bypass capacitor in a video/graphics front-end system;

calculating a droop in said input voltage in said analog-to-digital converter due to a charge sharing between an input sampling capacitor of the analog-to-digital converter and said bypass capacitor; and

compensating for the value of the droop in the bypass capacitor using an output of the analog-to-digital converter.

9. The method of claim 8, wherein said capturing comprises:

capturing said input voltage information to a first stage of a plurality of stages in the analog-to-digital converter.

10. The method of claim 8, wherein said compensating comprises compensating a common mode voltage droop.

11. The method of claim 8, wherein said compensating comprises compensating a differential mode voltage droop.

12. The method of claim 8, wherein said compensating comprises

performing a coarse compensation using the output of the first stage of the analog-to-digital converter;

and

performing a fine compensation using the output of the subsequent stages of the analog-to-digital converter.

13. The method of claim 8, wherein the analog-to-digital converter comprises a pipelined analog-to-digital converter.

14. The method of claim 8, whereby an increased input voltage swing at the input of the video/graphics front-end system can be supported.

15. The method of claim 8, whereby the capacitance value of the bypass capacitor is reduced.

16. A system comprising:

a means for capturing input voltage information to an analog-to-digital converter operatively coupled to a bypass capacitor in a video/graphics front-end system;

a programmable gain amplifier for optimizing dynamic range of said analog-to-digital converter, wherein said programmable gain amplifier and a sampling network couples said analog-to-digital converter with said bypass capacitor;

a means for calculating a droop in said input voltage in said analog-to-digital converter due to a charge sharing between an input sampling capacitor of the analog-to-digital converter and said bypass capacitor;

a digital logic operatively coupled to a stage of the analog-to-digital converter for processing a digital output of said stage; and

a digital-to-analog converter operatively coupled to said digital logic for convening said digital output to an analog output and for compensating for the value of the droop in the bypass capacitor by charging the bypass capacitor to said analog output.

17. The system of claim 16, wherein said means for capturing input voltage information captures the input voltage information to a first stage of a plurality of stages in the analog-to-digital converter.

18. The system of claim 16 compensates a common mode voltage

19. The system of claim 16 compensates a differential mode voltage droop.

20. The system of claim 16, wherein the analog-to-digital converter comprises a pipelined analog-to-digital converter.