Methods and systems for utilizing design data in combination with inspection data

• US 7,570,796 B2
• Filed: 11/20/2006
• Issued: 08/04/2009
• Est. Priority Date: 11/18/2005
• Status: Active Grant

• Current Assignee: Kla-Tencor Technologies Corporation (KLA Corporation)
• Original Assignee: Kla-Tencor Technologies Corporation (KLA Corporation)
• Inventors: Zafar, Khurram, Kekare, Sagar, Chang, Ellis, Rose, Peter, Park, Allen
• Primary Examiner(s): Le; Brian Q
• Application Number:
  US11/561,659
• Publication Number:
  US 20070288219A1
• Time in Patent Office: 988 Days
• Field of Search: 382/144, 382/145, 382/151, 382/287, 382/294
• US Class Current: 382/144
• CPC Class Codes: G03F 1/84 Inspecting
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: G06T 2207/20076 Probabilistic image processing
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/0006 using a design-rule based approach
• CPC Class Codes: G06T 7/0008 checking presence/absence

Abstract

Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.

Claims

1. A computer-implemented method for binning defects detected on a wafer, comprising:

using a computer to perform the following steps of;

comparing portions of design data proximate positions of the defects in design data space, wherein dimensions of the portions are determined based, at least in part, on positions of the defects reported by an inspection system used to detect the defects, coordinate inaccuracy of the inspection system, one or more attributes of the design data, defect size, defect size error of the inspection system, or some combination thereof;

determining if the design data in the portions is at least similar based on results of said comparing;

binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar; and

storing results of said binning in a storage medium.

2. The method of claim 1, wherein the dimensions of at least some of the portions are different.

3. The method of claim 1, wherein the design data in the portions comprises design data for more than one design layer.

4. The method of claim 1, wherein said comparing comprises comparing an entirety of the design data in at least some of the portions to the design data in others of the portions.

5. The method of claim 1, wherein said comparing comprises comparing different regions of the design data in at least some of the portions to the design data in others of the portions.

6. The method of claim 1, further comprising determining the positions of the defects in the design data space by comparing data acquired by the inspection system for alignment sites on the wafer with data for predetermined alignment sites.

7. The method of claim 1, further comprising determining the positions of the defects in the design data space by comparing data acquired by the inspection system during detection of the defects to locations in the design data determined by review.

8. The method of claim 1, wherein said binning comprises binning the defects in the groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar and such that one or more attributes of the defects in each of the groups are at least similar.

9. The method of claim 8, wherein the one or more attributes of the defects comprise one or more attributes of results of inspection in which the defects were detected, one or more parameters of the inspection, or some combination thereof.

10. The method of claim 1, wherein the portions of the design data proximate the positions of the defects comprise the design data on which the defects are located.

11. The method of claim 1, wherein the portions of the design data proximate the positions of the defects comprise the design data around the positions of the defects.

12. The method of claim 1, wherein said binning comprises binning the defects in the groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar and such that positions of the defects in each of the groups with respect to polygons in the portions are at least similar.

13. The method of claim 1, further comprising determining a defect criticality index for one or more of the defects.

14. The method of claim 1, further comprising determining a probability that one or more of the defects will cause one or more electrical faults in a device fabricated for the design data based on one or more attributes of the design data proximate the positions of the defects, one or more attributes of the defects, the positions of the defects reported by the inspection system used to detect the defects, the coordinate inaccuracy of the inspection system, or some combination thereof and determining a defect criticality index for the one or more of the defects based on the probability.

15. The method of claim 1, further comprising identifying hot spots in the design data based on the results of said binning.

16. The method of claim 1, further comprising selecting at least some of the defects for review based on the results of said binning.

17. The method of claim 1, further comprising generating a process for sampling the defects for review based on the results of said binning.

18. The method of claim 1, further comprising altering a process for inspecting the wafer based on the results of said binning.

19. The method of claim 1, further comprising altering a process for inspection of the wafer during the inspection based on results of the inspection.

20. The method of claim 1, further comprising altering a metrology process for the wafer based on the results of said binning.

21. The method of claim 1, further comprising altering a sampling plan for a metrology process for the wafer based on the results of said binning.

22. The method of claim 1, further comprising monitoring systematic defects, potential systematic defects, or some combination thereof over time using the results of said binning.

23. The method of claim 1, wherein the defects were detected by an inspection process, the method further comprising reviewing locations on the wafer at which one or more patterns of interest in the design data are printed, determining based on results of said reviewing if defects should have been detected at the locations of the one or more patterns of interest, and altering the inspection process to improve one or more defect capture rates.

24. The method of claim 1, further comprising prioritizing one or more patterns of interest in the design data and optimizing one or more processes to be performed on wafers on which the design data will be printed based on results of said prioritizing.

25. The method of claim 1, further comprising prioritizing one or more patterns of interest in the design data and optimizing at least one of the one or more patterns of interest based on results of said prioritizing.

26. The method of claim 1, further comprising prioritizing one or more patterns of interest in the design data and optimizing one or more resolution enhancement technology features of the one or more patterns of interest based on results of said prioritizing.

27. The method of claim 1, wherein the defects are detected by optical inspection.

28. The method of claim 1, wherein the defects are detected by electron beam inspection.

29. The method of claim 1, wherein the defects are detected in a process window qualification method.

30. The method of claim 1, further comprising determining if one or more of the groups of defects correspond to nuisance defects by reviewing at least some of the defects in the one or more of the groups and removing the one or more of the groups corresponding to the nuisance defects from results of an inspection process in which the defects were detected to increase signal-to-noise ratio of the results of the inspection process.

31. The method of claim 1, further comprising classifying one or more of the groups of defects based on results of review of at least some of the defects in the one or more of the groups, one or more attributes of the design data, one or more attributes of the defects, or some combination thereof.

32. The method of claim 1, further comprising determining a root cause of one or more of the groups of defects based on results of review of at least some of the defects in the one or more of the groups, one or more attributes of the design data, one or more attributes of the defects, or some combination thereof.

33. The method of claim 1, further comprising determining a root cause of one or more of the groups of defects by mapping at least some of the defects in the one or more of the groups to experimental process window results.

34. The method of claim 1, further comprising determining a root cause of one or more of the groups of defects by mapping at least some of the defects in the one or more of the groups to simulated process window results.

35. The method of claim 1, further comprising modeling electrical properties of a device being fabricated using the design data about a defect location and determining parametric relevancy of a defect at the defect location based on results of said modeling.

36. The method of claim 1, further comprising determining a kill probability value for one or more of the defects based on one or more attributes of the design data.

37. The method of claim 1, further comprising monitoring a kill probability value for one or more patterns of interest in the design data and assigning the kill probability value for the one or more patterns of interest to one or more of the groups if the portions of the design data proximate the positions of the defects binned into the one or more of the groups correspond to the one or more patterns of interest.

38. The method of claim 1, wherein the computer-implemented method is performed by the inspection system used to detect the defects.

39. The method of claim 1, wherein the computer-implemented method is performed by a system other than the inspection system used to detect the defects.

40. The method of claim 1, wherein said determining comprises determining if common patterns in the design data in the portions are at least similar.

41. The method of claim 1, wherein said determining comprises determining if common attributes of the design data in the portions are at least similar.

42. The method of claim 1, wherein said determining comprises determining if common attributes in feature space of the design data in the portions are at least similar.

43. The method of claim 1, further comprising determining a percentage of a die formed on the wafer impacted by one or more of the groups of defects.

44. The method of claim 1, further comprising determining one or more patterns of interest in the design data corresponding to at least one of the groups and determining a ratio of number of the defects binned in the at least one of the groups corresponding to the one or more patterns of interest to number of locations of the one or more patterns of interest on the wafer.

45. The method of claim 1, further comprising determining one or more patterns of interest in the design data corresponding to at least one of the groups and determining a ratio of number of the defects binned in the at least one of the groups corresponding to the one or more patterns of interest to number of locations of the one or more patterns of interest in the design data.

46. The method of claim 1, further comprising determining a pattern of interest in the design data corresponding to at least one of the groups, determining a percentage of a die formed on the wafer in which the defects binned in the at least one of the groups are located, and assigning a priority to the pattern of interest based on the percentage.

47. The method of claim 1, further comprising prioritizing one or more of the groups by number of total design instances on the wafer at which the defects in the one or more of the groups are detected.

48. The method of claim 1, further comprising prioritizing one or more of the groups by number of design instances on a reticle, used to print the design data on the wafer, at which the defects in the one or more of the groups are detected at least once.

49. The method of claim 1, further comprising determining reticle-based marginality for one or more of the groups based on number of locations on a reticle at which defects binned into the one or more of the groups were detected and total number of portions of the design data printed on the reticle that are similar to the portions of the design data proximate to the positions of the defects binned into the one or more of the groups.

50. The method of claim 1, further comprising converting the portions of the design data proximate the positions of the defects in the design data space to bitmaps prior to said comparing, wherein said comparing comprises comparing the bitmaps to each other.

51. A computer-implemented method for binning defects detected on a wafer, comprising:

using a computer to perform the following steps of;

comparing positions of the defects in design data space with positions of hot spots in design data, wherein hot spots located proximate to design data that is at least similar are correlated with each other;

associating the defects and the hot spots having positions that are at least similar;

binning the defects in groups such that the defects in each of the groups are associated with only hot spots that are correlated with each other;

storing results of said binning in a storage medium; and

prioritizing one or more of the groups by number of total hot spots correlated with the hot spots associated with the defects in the one or more groups and number of the defects in the one or more of the groups.

52. The method of claim 51, further comprising correlating the hot spots by identifying a location of a pattern of interest in the design data associated with a systematic defect, correlating the pattern of interest with similar patterns in the design data, and correlating the location of the pattern of interest and locations of the similar patterns in the design data as positions of correlated hot spots.

53. The method of claim 51, further comprising assigning a design based classification to one or more of the groups.

54. The method of claim 51, wherein the computer-implemented method is performed by an inspection system used to detect the defects on the wafer.

55. The method of claim 51, wherein the hot spots are identified by an inspection system used to detect the defects on the wafer.

56. The method of claim 51, further comprising monitoring the hot spots using results of inspection of one or more wafers on which the design data is printed.

57. The method of claim 51, further comprising inspecting the wafer based on correlations between the hot spots.

58. The method of claim 51, further comprising monitoring systematic defects, potential systematic defects, or some combination thereof over time using the results of said binning.

59. The method of claim 51, further comprising performing review of the defects based on the results of said binning.

60. The method of claim 51, further comprising generating a process for selecting the defects for review based on the results of said binning.

61. The method of claim 51, further comprising identifying systematic defects and potential systematic defects in the design data based on the results of said binning and monitoring occurrence of the systematic defects and the potential systematic defects over time.

62. The method of claim 51, further comprising generating a process for inspecting wafers on which the design data has been printed based on the results of said binning.

63. The method of claim 51, further comprising altering a process for inspecting wafers on which the design data has been printed based on the results of said binning.

64. The method of claim 51, further comprising determining a percentage of a die formed on the wafer impacted by one or more of the groups of defects.

65. The method of claim 51, further comprising determining a defect criticality index for one or more of the defects.

66. The method of claim 51, further comprising determining a percentage of a die formed on the wafer in which the defects binned in at least one of the groups are located and assigning a priority to the at least one of the groups based on the percentage.

67. The method of claim 51, further comprising prioritizing one or more of the groups by number of corresponding hot spot locations on a reticle used to print the design data on the wafer at which the defects in the one or more of the groups are detected at least once.

68. The method of claim 51, further comprising determining reticle-based marginality for one or more of the groups based on number of locations on a reticle at which defects binned into the one or more of the groups were detected and total number of hot spot locations on the reticle that are correlated with the hot spots associated with the defects in the one or more of the groups.

69. A computer-implemented method for binning defects detected on a wafer, comprising:

using a computer to perform the following steps of;

comparing one or more attributes of design data proximate positions of the defects in design data space;

determining if the one or more attributes of the design data proximate the positions of the defects are at least similar based on results of said comparing;

binning the defects in groups such that the one or more attributes of the design data proximate the positions of the defects in each of the groups are at least similar;

storing results of said binning in a storage medium; and

determining if the defects are random or systematic defects using the one or more attributes.

70. The method of claim 69, wherein the one or more attributes comprise pattern density.

71. The method of claim 69, further comprising ranking one or more of the groups using the one or more attributes.

72. The method of claim 69, further comprising ranking the defects in at least one of the groups using the one or more attributes.

73. The method of claim 69, wherein the one or more attributes comprise the one or more attributes in feature space.

74. The method of claim 69, further comprising binning the defects within at least one of the groups into sub-groups using the one or more attributes.

75. The method of claim 69, further comprising analyzing the defects within at least one of the groups using the one or more attributes.

76. The method of claim 69, further comprising determining a yield relevancy of one or more of the defects using the one or more attributes.

77. The method of claim 69, further comprising determining overall yield relevancy of one or more of the groups using the one or more attributes.

78. The method of claim 69, further comprising assigning a defect criticality index to one or more of the defects using the one or more attributes.

79. The method of claim 69, further comprising separating the design data proximate the positions of the defects into the design data in an area around the defects and the design data in an area on which the defects are located.

80. The method of claim 69, further comprising identifying structures in the design data for binning or filtering using rules and the one or more attributes.

81. The method of claim 69, further comprising determining locations on the wafer at which review, measurement, test, or some combination thereof is to be performed based on inspection results generated during detection of the defects and based on the defects identified as the systematic defects.

82. The method of claim 69, further comprising determining locations on the wafer at which review, measurement, test, or some combination thereof is to be performed based on inspection results generated during detection of the defects, the defects identified as the systematic defects, and yield relevancy of the defects.

83. The method of claim 69, further comprising determining locations on the wafer at which review, measurement, test, or some combination thereof is to be performed based on inspection results generated during detection of the defects, the defects identified as the systematic defects, and process window mapping.

84. The method of claim 69, further comprising performing systematic discovery using the results of said binning and user-assisted review.

85. The method of claim 69, further comprising prior to said comparing, separating the defects based on functional blocks in which the defects are located to improve signal-to-noise in the results of said binning.

86. The method of claim 69, wherein the design data is organized by design into hierarchical cells, the method further comprising prior to said comparing, separating the defects based on the hierarchical cells in which the defects are located to improve signal-to-noise in the results of said binning.

87. The method of claim 69, wherein the design data is organized by design into hierarchical cells, and wherein if a defect could be located in more than one of the hierarchical cells, the method further comprises correlating the defect to each of the hierarchical cells based on a probability that the defect is located in each of the hierarchical cells based on area of the hierarchical cells, defect positional probability, or some combination thereof.

88. The method of claim 69, wherein the defects were detected by an inspection process, the method further comprising reviewing locations on the wafer at which one or more patterns of interest in the design data are printed, determining based on results of said reviewing if defects should have been detected at the locations of the one or more patterns of interest, and altering the inspection process to improve one or more defect capture rates.