Flat display panel having internal power supply circuit for reducing power consumption

• US 7,592,976 B2
• Filed: 03/01/2006
• Issued: 09/22/2009
• Est. Priority Date: 11/19/1993
• Status: Expired due to Fees

• Current Assignee: Hitachi Maxell Limited (Hitachi, Ltd.)
• Original Assignee: Hitachi Plasma Patent Licensing Company Limited (Hitachi, Ltd.)
• Inventors: Matsui, Naoki, Yao, Shinpei, Tomio, Shigetoshi
• Primary Examiner(s): Dinh; Duc Q
• Application Number:
  US11/364,007
• Publication Number:
  US 20060176248A1
• Time in Patent Office: 1,301 Days
• Field of Search: 345 60- 67, 345/211, 345/690, 345/212, 345/208
• US Class Current: 345/60
• CPC Class Codes: G09G 2330/02 Details of power systems and of start or stop of display operation
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 2330/04 Display protection
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/2927 Details of initialising
• CPC Class Codes: G09G 3/294 for lighting or sustain discharge
• CPC Class Codes: G09G 3/297 using opposed discharge type panels

Abstract

A flat display employs at least one high voltage different from logic voltages. The display has a voltage detection unit and a drive control signal control unit. The voltage detection unit is used to detect the high voltage. The drive control signal control unit is used to control drive control signals of the flat display in accordance with the detected high voltage. This arrangement eliminates charging currents that are applied to a display panel but have nothing to do on the actual displaying of data, or reactive currents due to unnecessary switching operations, thereby reducing power consumption.

Claims

1. A flat display device having a display panel in which a plurality of X electrodes and plurality of Y electrodes are provided, adjacent to each other, and a plurality of address electrodes intersecting with the X and the Y electrodes, comprising:

a first detection unit which detects a voltage value of a display high voltage that is applied to the X and the Y electrodes to generate a sustain discharge; and

a second detection unit which detects an externally input signal or an existence of input display data; and

a drive controller which controls an application of a drive signal to the X electrodes, the Y electrodes and the address electrodes according to the detection results of the first and second detection units.

2. A flat display device according to the claim 1, further comprising:

an internal power supply circuit supplied with a logic voltage and the display high voltage and outputting an address discharge pulse voltage, a write discharge pulse voltage and an erase pulse voltage; and

an internal power control unit which controls an operation of the internal power supply circuit.

3. A flat display device according to the claim 2, further comprising:

a voltage detection unit which detects the address discharge pulse voltage, the write discharge pulse voltage and the erase pulse voltage,

wherein the internal power control unit controls the operation of the internal power supply circuit, according to the display high voltage, and the address discharge pulse voltage, write discharge pulse voltage and erase pulse voltage detected by the voltage detection unit.

4. A flat display device according to the claim 2, further comprising:

a voltage detection unit which detects the address discharge pulse voltage, the write discharge pulse voltage and the erase pulse voltage,

wherein the drive controller controls the application of the drive signal to the X electrodes, the Y electrodes and the address electrodes according to the display high voltage, and the address discharge pulse voltage, the write discharge pulse voltage and the erase pulse voltage detected by the voltage detection unit.

5. A flat display device according to the claim 2, wherein:

the drive controller stops applying the drive signal to the X electrodes, the Y electrodes and the address electrodes, while the detected display high voltage does not reach an internally set prescribed value, and resumes applying the drive signal to the X electrodes, the Y electrodes and the address electrodes, when the detected display high voltage reaches the internally set prescribed value.

6. A flat display device according to the claim 2, wherein:

the drive controller has at least a first prescribed value and a second prescribed value, higher than the first prescribed value, internally set for comparing with the detected display high voltage, stops applying the drive signal to the X electrodes, the Y electrodes and the address electrodes when the detected display high voltage does not reach the first prescribed value, and resumes applying the drive signal to the X electrodes, the Y electrodes and the address electrodes when the detected display high voltage reaches the second prescribed value.

7. A flat display device according to the claim 1, wherein:

the drive controller stops applying the drive signal to the X electrodes, the Y electrodes and the address electrodes through a drive control signal when the second detection unit does not detect the externally input signal or the existence of input display data.