Control circuit for a polarity inverting buck-boost DC-DC converter

• US 7,595,616 B2
• Filed: 05/19/2005
• Issued: 09/29/2009
• Est. Priority Date: 05/28/2004
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments Deutschland Gesellschaft Mit Beschrã¤Nkter Haftung (Texas Instruments, Inc.)
• Inventors: Reithmaier, Stefan, Scoones, Kevin, Prexl, Franz
• Primary Examiner(s): Tso; Edward
• Assistant Examiner(s): RAMADAN, RAMY O
• Application Number:
  US11/132,899
• Publication Number:
  US 20060012355A1
• Time in Patent Office: 1,594 Days
• Field of Search: 323/265, 323/268, 323/273, 323/280, 323/281, 323/159, 323/344
• US Class Current: 323/280
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 1/36 Means for starting or stopping converters
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A control circuit for a polarity inverting buck-boost DC-DC converter, includes an operational trans-conductance amplifier that has inputs to which a sensed voltage difference signal is applied and an output connected to an input of a voltage-to-duty-cycle converter. A compensation capacitance is connected between the output of the amplifier and a fixed supply terminal. The compensation capacitance includes a first capacitor that is permanently connected between the output of the amplifier and the fixed supply terminal and a second capacitor that has a switched connection between the output of the amplifier and the fixed supply terminal. The first capacitor has a small capacitance compared to the second capacitor. The switched connection of the second capacitor is controlled by a continuous-discontinuous mode detection circuit.

Claims

1. An apparatus comprising:

an operational trans-conductance amplifier that has inputs to which a sensed voltage difference signal is applied and an output connected to an input of a voltage-to-duty-cycle converter;

a compensation capacitance connected between the output of the amplifier; and

a fixed supply terminal, wherein the compensation capacitance includes;

a first capacitor that is permanently connected between the output of the amplifier and the fixed supply terminal; and

a second capacitor that has a switched connection between the output of the amplifier and the fixed supply terminal, the first capacitor having a small capacitance compared to the second capacitor, and the switched connection of the second capacitor being controlled by a continuous-discontinuous mode detection circuit.

2. The apparatus of claim 1, and further comprising a buffer amplifier with an input connected to the first capacitor and an output connected to the second capacitor.

3. The apparatus of claim 2, wherein the buffer amplifier has an output stage with two MOS output transistors each connected between the output and one of two supply terminals, and a biasing circuit that drives both output transistors so that only one of the two is conductive at a time.

4. An apparatus comprising:

a first control circuit that senses the voltage difference between a first and a second terminal;

an error amplifier that is coupled to the second terminal and ground;

a first amplifier that is coupled to the second terminal and ground;

a compensation capacitance that is coupled to the first amplifier, wherein the compensation capacitance receives an output from the first amplifier, and wherein the compensation capacitance includes;

a first capacitor that is coupled to the first amplifier;

a first switch coupled to the first amplifier and the first capacitor;

a continuous-discontinuous mode detection circuit that controls the switch; and

a second capacitor coupled to the first switch, wherein the first capacitor has a lower capacitance than the second capacitor; and

a voltage-to-current converter that is coupled to the compensation capacitance;

a summing node that receives currents from the voltage-to-current converter, the first control circuit, and the error amplifier;

a switched capacitance coupled to the summing node; and

a second amplifier coupled to the switched capacitance.

5. The apparatus of claim 4, wherein the compensation capacitance further comprises a voltage-to-duty cycle conversion circuit that is coupled to the first capacitor and the first switch, wherein the voltage-to-duty cycle conversion circuit outputs a signal to the continuous-discontinuous mode detection circuit.

6. The apparatus of claim 4, wherein the compensation capacitance further comprises a second amplifier with an input coupled to the first capacitor and an output coupled to the second capacitor.

7. The apparatus of claim 6, wherein the second amplifier has an output stage with two MOS output transistors each coupled between the output and one of two supply terminals, and a biasing circuit that drives both output transistors so that only one of the two is conductive at a time.

8. The apparatus of claim 4, wherein the switched capacitance further comprises:

a second switch coupled between the summing node and ground; and

a third capacitance that is coupled generally in parallel to the second switch.

9. An apparatus comprising:

an input circuit coupled to a first terminal, a second terminal, and ground;

a first amplifier that is coupled to the second terminal and ground;

a compensation capacitance that is coupled to the first amplifier, wherein the compensation capacitance receives an output from the first amplifier, and wherein the compensation capacitance includes;

a first capacitor that is coupled to the first amplifier;

a first switch coupled to the first amplifier and the first capacitor;

a continuous-discontinuous mode detection circuit that controls the switch;

a second capacitor coupled to the first switch, wherein the first capacitor has a lower capacitance than the second capacitor;

a voltage-to-duty cycle conversion circuit that is coupled to the first capacitor and the first switch, wherein the voltage-to-duty cycle conversion circuit outputs a signal to the continuous-discontinuous mode detection circuit;

a second amplifier with an input coupled to the first capacitor and an output coupled to the second capacitor; and

an output circuit coupled to the compensation capacitance and the input circuit.

10. The apparatus of claim 9, wherein the input circuit further comprises:

a first control circuit that senses the voltage difference between the first and second terminals; and

an error amplifier that is coupled to the second terminal and ground.

11. The apparatus of claim 9, wherein the output circuit further comprises:

a voltage-to-current converter that is coupled to the compensation capacitance;

a summing node that receives currents from the voltage-to-current converter, the first control circuit, and the error amplifier;

a switched capacitance coupled to the summing node; and

a second amplifier coupled to the switched capacitance.

12. The apparatus of claim 11, wherein the switched capacitance further comprises:

a second switch coupled between the summing node and ground; and

a third capacitance that is coupled generally in parallel to the second switch.

13. The apparatus of claim 9, wherein the second amplifier has an output stage with two MOS output transistors each coupled between the output and one of two supply terminals, and a biasing circuit that drives both output transistors so that only one of the two is conductive at a time.