Backplane interface adapter with error control and redundant fabric

• US 7,596,139 B2
• Filed: 11/16/2001
• Issued: 09/29/2009
• Est. Priority Date: 11/17/2000
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Foundry Networks Incorporated (Broadcom, Inc.)
• Inventors: Chang, Andrew, Patel, Ronak, Wong, Ming G., Lin, Yu-mei
• Primary Examiner(s): Pham; Chi H.
• Assistant Examiner(s): MEW, KEVIN D
• Application Number:
  US09/988,066
• Publication Number:
  US 20020105966A1
• Time in Patent Office: 2,874 Days
• Field of Search: 370/231, 370/232, 370/235, 370/360, 370/365, 370/367, 370/380, 370/387, 370/388, 370/389, 370/428, 370/429, 370/463, 370/503, 370/507, 370/508, 370/509, 370/510, 370/511, 370/512, 370/513, 370/514
• US Class Current: 370/392
• CPC Class Codes: H04L 45/74 Address processing for routing
• CPC Class Codes: H04L 47/50 Queue scheduling
• CPC Class Codes: H04L 47/6225 Fixed service order, e.g. Round Robin
• CPC Class Codes: H04L 49/153 ATM switching fabrics having parallel switch planes
• CPC Class Codes: H04L 49/1538 Cell slicing
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/30 Peripheral units, e.g. input or output ports
• CPC Class Codes: H04L 49/3063 Pipelined operation
• CPC Class Codes: H04L 49/352 Gigabit ethernet switching [GBPS]
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers

Abstract

A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter'"'"'s ability to properly and consistently receive receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.

Claims

1. A method for maintaining synchronization of striped data traffic, comprising the steps of:

(a) sending a common character in striped data in all lanes for a predetermined number of cycles;

(b) evaluating the common control characters received at stripe receive synchronization queues; and

(c) detecting when an in-synch condition is present that indicates the stripe receive synchronization queues have been cleared.

2. A method for managing out-of-synchronization traffic flow, comprising:

(a) monitoring a level of stripe receive synchronization queues;

(b) determining whether an out-of-synchronization condition exists; and

(c) initiating a re-synchronization routine when said out-of-synchronization condition exists; and

further comprising, after said initiating step (c), the steps of;

(d) sending a common character in striped data in all lanes for a predetermined number of cycles;

(e) evaluating the common control characters received at the stripe receive synchronization queues; and

(f) detecting when an in-synch condition is present that indicates the stripe receive synchronization queues have been cleared.

3. A method for maintaining synchronization of striped data traffic, comprising the steps of:

(a) sending a common character in striped data in all lanes for a predetermined number of cycles; and

(b) evaluating the common control characters received at stripe receive synchronization queues; and

(c) detecting when an in-synch condition is present.

4. A method comprising:

(a) monitoring a level of stripe receive synchronization queues;

(b) determining whether an out-of-synchronization condition exists; and

(c) initiating a re-synchronization routine when said out-of-synchronization condition exists; and

further comprising, after said initiating step (c),the steps of;

(d) sending a common character in striped data in all lanes for a predetermined number of cycles;

(e) evaluating the common control characters to detect when an in-synch condition is present.