Integrated antenna type circuit apparatus

• US 7,615,856 B2
• Filed: 08/31/2005
• Issued: 11/10/2009
• Est. Priority Date: 09/01/2004
• Status: Expired due to Fees

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Sakai, Atsushi, Usui, Ryosuke, Inoue, Yasunori
• Primary Examiner(s): Chu, Chris C
• Application Number:
  US11/215,131
• Publication Number:
  US 20060049995A1
• Time in Patent Office: 1,532 Days
• Field of Search: 257/E27.137, 257/E27.144, 257/E27.161, 257/685, 257/686, 257/777, 257/723, 257/724, 257/E21.614, 257/E25.006, 257/E25.013, 257/E25.018, 257/E25.021, 257/E25.027, 257/E23.085, 437/108, 437/109, 361/760
• US Class Current: 257/686
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05099 Material
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/24145 the bodies being stacked
• CPC Class Codes: H01L 2224/24195 the item being a discrete passive component
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48464 the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
• CPC Class Codes: H01L 2224/73267 : Layer and HDI connectors
• CPC Class Codes: H01L 2225/06568 : the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 24/19 : Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18162 : of a chip with build-up interconnect
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01Q 1/2283 : mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
• CPC Class Codes: H05K 1/0298 : Multilayer circuits
• CPC Class Codes: H05K 1/16 : incorporating printed electric components, e.g. printed resistor, capacitor, inductor

Abstract

An integrated antenna type circuit apparatus which provides excellent circuit characteristics while suppressing an increase in packaging area. The integrated antenna type circuit apparatus includes an insulating base, a semiconductor circuit device, chip parts, a molding resin, an antenna conductor, a ground conductor, and external lead electrodes. The plurality of chip parts are mounted on the insulating base, and are soldered to electrodes of wiring conductors on the top of the insulating base for electric and physical connection. The insulating base has a multilayer structure, being formed by laminating a plurality of insulator layers. The antenna conductor is formed on the bottom of the insulating base. A wiring conductor adjacent to the antenna conductor is provided with the ground conductor so that it overlaps with the antenna conductor.

Claims

1. A semiconductor integrated circuit apparatus comprising:

an insulating resin film;

a first circuit device embedded in the insulating resin film;

a flat-shaped wiring layer of fixed potential, being formed on the insulating resin film above the first circuit device; and

a second circuit device formed on the wiring layer, wherein

the first circuit device or the second circuit device is a capacitive chip including a plurality of capacitive device units,

at least one of the capacitive device units has a low-capacity capacitor and a high-capacity capacitor, and

the low-capacity capacitor and the high-capacity capacitor are connected in parallel.

2. A semiconductor integrated circuit apparatus comprising:

an insulating resin film;

a first circuit device embedded in the insulating resin film;

a first wiring layer having one end connected to the first circuit device and the other end extended to reach a top of the insulating resin film;

a second circuit device formed on the insulating resin film above the first circuit device; and

a second wiring layer of fixed potential, being formed around the second circuit device, wherein

the first circuit device or the second circuit device is a capacitive chip including a plurality of capacitive device units,

at least one of the capacitive device units has a low-capacity capacitor and a high-capacity capacitor, and

the low-capacity capacitor and the high-capacity capacitor are connected in parallel.

3. The semiconductor integrated circuit apparatus according to claim 2, further comprising

a third wiring layer of variable potential, being formed on the insulating resin film above the first circuit device so as to lie between the second circuit device and the second wiring layer.

4. The semiconductor integrated circuit apparatus according to claim 3, wherein

the second wiring layer has a wiring height greater than that of the third wiring layer.

5. A semiconductor integrated circuit apparatus comprising:

an insulating resin film;

a first circuit device embedded in the insulating resin film;

a flat-shaped wiring layer of fixed potential, being formed on the insulating resin film above the first circuit device; and

a second circuit device formed on the wiring layer,

wherein the wiring layer is larger than the second circuit device,

the first circuit device or the second circuit device is a capacitive chip including a plurality of capacitive device units,

at least one of the capacitive device units has a low-capacity capacitor and a high-capacity capacitor, and

the low-capacity capacitor and the high-capacity capacitor are connected in parallel.

6. A semiconductor integrated circuit apparatus comprising:

an insulating resin film;

a first circuit device embedded in the insulating resin film;

a first wiring layer having one end connected to the first circuit device and the other end extended to reach a top of the insulating resin film;

a second circuit device formed on the insulating resin film above the first circuit device; and

a second wiring layer of fixed potential, being formed around the second circuit device in a continuous manner, wherein;

the first circuit device or the second circuit device is a capacitive chip including a plurality of capacitive device units;

at least one of the capacitive device units has a low-capacity capacitor and a high-capacity capacitor; and

the low-capacity capacitor and the high-capacity capacitor are connected in parallel.