Time-gap defect detection apparatus and method

• US 7,653,766 B1
• Filed: 04/23/2008
• Issued: 01/26/2010
• Est. Priority Date: 11/30/2001
• Status: Expired due to Fees

• Current Assignee: AFTG-TG LLC
• Original Assignee: AFTG-TG LLC
• Inventors: Adams, Philip M.
• Primary Examiner(s): CHEN, ALAN S
• Application Number:
  US12/108,363
• Time in Patent Office: 643 Days
• Field of Search: None
• US Class Current: 710/57
• CPC Class Codes: G06F 11/004 Error avoidance G06F11/07 and subgroups take precedence
• CPC Class Codes: G06F 11/0745 in an input/output transactions management context input/output processing in general G06F13/00
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: H04L 47/10 Flow control; Congestion control

Abstract

A programmatic time-gap defect correction apparatus and method corrects errors which may go undetected by a computer system. Buffer underruns or overruns, which may incur errors in data transfers, yet remain undetected and uncorrected in a computer system, are corrected by an error avoidance module in accordance with the invention. Bytes transferred to and from buffers, used by an I/O controllers to temporarily store data while being transferred between synchronous and asynchronous devices, are counted and an error condition is forced based on the count. If the count exceeds the capacity of the buffer, an error condition is forced, thereby reducing chances that errors are incurred into the data transfer.

Claims

1. An apparatus detecting time-gap defects in a first device communicating with a second device and a third device, the apparatus comprising:

the first device controlling an exchange of data between the second and third devices, configured to detect errors in the exchange, and having a buffer, characterized by a capacity, to temporarily store the data exchanged, and

a memory device operably connected to the first device to store data structures of executable and non-executable types, the data structures comprising a detector detecting a time-gap sufficiently long that a data transfer error has occurred, causing data corruption undetected by the first device.

2. The apparatus of claim 1, wherein the first device further comprises a processor programmed to enable the detector.

3. The apparatus of claim 1, wherein the time-gap corresponds to a delay in the exchange, selected from a delay between transfer of consecutive bytes, a delay during transfer of a byte, a delay during transfer of a burst of bytes, a delay between transfer of consecutive bursts of bytes, and an accumulated delay corresponding to a sum of delays accumulated during a plurality of consecutive transfers.

4. The apparatus of claim 1, wherein the time-gap corresponds to at least one delay in the exchange, comprising at least one of a delay between transfer of consecutive bytes, a delay during transfer of a byte, a delay during transfer of a burst of bytes, a delay between transfer of consecutive bursts of bytes, and an accumulated delay corresponding to a sum of delays accumulated during a plurality of consecutive transfers.

5. The apparatus of claim 1, wherein the time-gap is a delay between completions of consecutive transfers.

6. The apparatus of claim 5, wherein the delay corresponds to a time selected from the group consisting of an intra-byte transfer time, an inter-byte transfer time, an intra-burst transfer time, and an inter-burst transfer time.

7. The apparatus of claim 5, wherein the delay is at least one of an intra-byte transfer time, an inter-byte transfer time, an intra burst transfer time, and an inter-burst transfer time between completion of consecutive transfers.

8. The apparatus of claim 5, wherein the delay corresponds to a time between completion of consecutive events selected from the group consisting of a beginning and end of a transfer of a byte, a beginning and end of a time between transfers of consecutive bytes, a beginning and end of a transfer of a burst of bytes, and a beginning and end of an inter-burst transfer time.

9. The apparatus of claim 1, wherein the detector measures the time-gap by counting operations of at least one of a processor, the memory device, the first device, the second device, the third device, a clock, and a bus.

10. The apparatus of claim 1, wherein at least one of the first, second, and third devices is a hardware component of a computing system.

11. The apparatus of claim 10, wherein the hardware component is selected from the group consisting of a bus, controller, processor, memory device, input device, output device, cable, and wire.

12. A method comprising:

identifying a first device controlling an exchange of data between a second device and a third device, the first device configured to detect errors in the exchange and having a buffer, characterized by a capacity, to temporarily store the data exchanged;

initiating a data exchange between the second and third devices;

identifying a time-gap within the data exchange at which data corruption is permitted by the first device without detection by the first device, the time-gap corresponding to a delay in the data exchange, selected from a delay between transfer of consecutive bytes, a delay during transfer of a byte, a delay during transfer of a burst of bytes, a delay between transfer of consecutive bursts of bytes, and an accumulated delay corresponding to a sum of delays accumulated during a plurality of consecutive transfers.

13. A method comprising:

identifying a first device controlling an exchange of data between a second device and a third device, the first device configured to detect errors in the exchange and having a buffer, characterized by a capacity, to temporarily store the data exchanged;

initiating a data exchange between the second and third devices;

identifying a time-gap within the data exchange at which data corruption is permitted by the first device without detection by the first device, the time-gap corresponding to at least one delay in the data exchange, comprising at least one of a delay between transfer of consecutive bytes, a delay during transfer of a byte, a delay during transfer of a burst of bytes, a delay between transfer of consecutive bursts of bytes, and an accumulated delay corresponding to a sum of delays accumulated during a plurality of consecutive transfers.

14. A method comprising:

identifying a first device controlling an exchange of data between a second device and a third device, the first device configured to detect errors in the exchange and having a buffer, characterized by a capacity, to temporarily store the data exchanged;

initiating a data exchange between the second and third devices;

identifying a time-gap within the data exchange at which data corruption is permitted by the first device without detection by the first device, the time-gap being a delay between completions of consecutive transfers.

15. The method of claim 14, wherein the delay corresponds to a time selected from the group consisting of an intra-byte transfer time, an inter-byte transfer time, an intra-burst transfer time, and an inter-burst transfer time.

16. The method of claim 14, wherein the delay is at least one of an intra-byte transfer time, an inter-byte transfer time, an intra burst transfer time, and an inter-burst transfer time between completion of consecutive transfers.

17. The method of claim 14, wherein the delay corresponds to a time between completion of consecutive events selected from the group consisting of a beginning and end of a transfer of a byte, a beginning and end of a time between transfers of consecutive bytes, a beginning and end of a transfer of a burst of bytes, and a beginning and end of an inter-burst transfer time.

18. A method for detecting time-gap defects in a first device communicating with a second device and a third device, the method comprising:

initiating a data transfer between at least one of the first, second, and third devices and a buffer having a capacity;

determining a time-gap within the data transfer at which data corruption is permitted by the first device without detection by the first device, the time-gap corresponding to at least one delay in the data transfer comprising at least one of a delay between transfer of consecutive bytes, a delay during transfer of a byte, a delay during transfer of a burst of bytes, a delay between transfer of consecutive bursts of bytes, and an accumulated delay corresponding to a sum of delays accumulated during a plurality of consecutive transfers.

19. The method of claim 18, wherein:

the data transfer is between the second device and the third device;

the first device controls the data transfer;

the first device comprises a buffer, characterized by a capacity, to temporarily store the data exchanged during the data transfer; and

the first device is configured to detect errors in the data transfer.