Partial block data programming and reading operations in a non-volatile memory

CAFC
  • US 7,657,702 B2
  • Filed: 02/13/2009
  • Issued: 02/02/2010
  • Est. Priority Date: 01/19/2001
  • Status: Expired due to Term
First Claim
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1. In a re-programmable non-volatile semiconductor memory system having an array of charge storage elements, the array being divided into a plurality of sub-arrays in which the charge storage elements within individual sub-arrays are programmable independently, wherein the sub-arrays are individually divided into a plurality of blocks of charge storage elements that are erasable together, a method of operating the memory system, comprising:

  • utilizing at least first and second of the plurality of blocks logically linked together as a metablock, the logically linked first and second of the plurality of blocks being positioned in at least respective first and second of the plurality of sub-arrays, the plurality of blocks being individually divided into a given number of a plurality of pages of charge storage elements that are programmable together,programming a first group of a plurality of pages in at least the first and second blocks with original data, the pages of original data having logical addresses associated therewith,maintaining an updatable address data structure that links one or more physical addresses of the first group of pages with one or more of the logical addresses associated with the data stored therein,programming an updated version of some of the original data and logical addresses associated with the updated version of the original data into a second group of one or more pages less than said given number in at least one update block other than the first and second blocks, wherein the logical addresses associated with the updated version of the original data programmed into the second group of pages are the same as those associated with the corresponding original data programmed into the first group of pages, and further wherein programming the second group of pages additionally comprises programming the updated version of the original data in those of the second group of pages that have different offset positions within the update block than offset positions of the first group of pages within the first and second blocks that contain original data having the same logical addresses associated therewith, andupdating the address data structure for the logical addresses of the updated version of the original data to include the physical addresses of the second group of pages of the update block in which the updated version of the original data has been programmed.

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