Low noise amplifier

• US 7,671,686 B2
• Filed: 08/08/2008
• Issued: 03/02/2010
• Est. Priority Date: 10/24/2007
• Status: Active Grant

• Current Assignee: Industrial Technology Research Institute
• Original Assignee: Industrial Technology Research Institute
• Inventors: Chen, Chih-Hung, Kuo, Ming-Ching, Kao, Shiau-Wen
• Primary Examiner(s): Nguyen; Khanh V
• Application Number:
  US12/188,280
• Publication Number:
  US 20090108943A1
• Time in Patent Office: 571 Days
• Field of Search: 330/253, 330/261, 330/301, 330/311
• US Class Current: 330/301
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2203/45306 the common gate stage implemented as dif amp eventually for cascode dif amp
• CPC Class Codes: H03F 2203/45318 the AAC comprising a cross coupling circuit, e.g. two extra transistors cross coupled
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence

Abstract

A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the body of the second transistor is coupled to the source of the first transistor; and the third and fourth transistors of the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between the gate of the third transistor and the source of the fourth transistor, and a second capacitance is coupled between the gate of the fourth transistor and the source of the third transistor.

Claims

1. A low-noise amplifier circuit to convert a single-ended input into a dual-ended output, comprising:

an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor;

a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor;

each of the first, second, third, and fourth transistors having a body, gate, source, and drain;

the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration;

the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit;

the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor;

the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the body of the second transistor is coupled to the source of the first transistor; and

the third and fourth transistors of the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between the gate of the third transistor and the source of the fourth transistor, and a second capacitance is coupled between the gate of the fourth transistor and the source of the third transistor.

2. The low-noise amplifier circuit of claim 1, further comprising:

a first resistance coupled between the gate of the first transistor and a terminal for receiving a first bias voltage;

a second resistance coupled between the gate of the second transistor and a terminal for receiving the first bias voltage;

a third resistance coupled between the gate of the third transistor and a terminal for receiving a second bias voltage;

a fourth resistance coupled between the gate of the fourth transistor and a terminal for receiving the second bias voltage;

a first impedance circuit coupled between the drain of the third transistor and a power source terminal; and

a second impedance circuit coupled between the drain of the fourth transistor and the power source terminal.

3. The low-noise amplifier circuit of claim 2 further comprising a third impedance circuit coupled between the source of the first transistor and a ground terminal.

4. The low-noise amplifier circuit of claim 2 further comprising a third impedance circuit coupled between the source of the second transistor and a ground terminal.

5. The low-noise amplifier circuit of claim 2 further comprising a third impedance circuit coupled between the source of the first transistor and a ground terminal, and a fourth impedance circuit coupled between the source of the second transistor and the ground terminal.

6. The low-noise amplifier circuit of claim 1 further comprising a third capacitance coupled between the gate of the first transistor and the source of the second transistor, and a fourth capacitance coupled between the gate of the second transistor and the source of the first transistor.

7. The low-noise amplifier circuit of claim 5, wherein one or more of the first, second, third, and fourth impedance circuits comprises an inductance.

8. The low-noise amplifier circuit of claim 5, wherein one or more of the first, second, third, and fourth impedance circuits comprises a resistance.

9. The low-noise amplifier circuit of claim 5, wherein one or more of the first, second, third, and fourth impedance circuits comprises a resistance and a capacitance coupled in parallel.

10. The low-noise amplifier circuit of claim 5, wherein one or more of the first, second, third, and fourth impedance circuits comprises a transistor.

11. The low-noise amplifier circuit of claim 5, wherein one or more of the first, second, third, and fourth impedance circuits comprises any combination of a resistance, a capacitance, an inductance, and a transistor.

12. A low-noise amplifier circuit to convert a single-ended input into a dual-ended output, comprising:

an input transconductance stage circuit including first and second MOS transistors;

a current buffer circuit including third and fourth MOS transistors;

the input transconductance stage circuit and the current buffer circuit being cascode coupled and forming a cascode amplifier configuration;

the first and second MOS transistors in the input transconductance stage circuit being cross-coupled, wherein a body of the first transistor is coupled to a source of the second transistor, and a body of the second transistor is coupled to a source of the first transistor;

the third and fourth MOS transistors in the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between a gate of the third transistor and a source of the fourth transistor, and a second capacitance is coupled between a gate of the fourth transistor and a source of the third transistor;

the single-ended input being at the source of one of the first and second transistors;

the dual-ended output being a differential output across a drain of the third MOS transistor in the current buffer circuit and a drain of the fourth MOS transistor in the current buffer circuit.

13. The low-noise amplifier circuit of claim 12 further comprising a first impedance circuit coupled between the source of the first transistor and a ground terminal, a second impedance circuit coupled between the source of the second transistor and the ground terminal, a third impedance circuit coupled between the drain of the third transistor and a power source terminal, and a fourth impedance circuit coupled between the drain of the fourth transistor and the power source terminal.

14. The low-noise amplifier circuit of claim 12 further comprising a third capacitance coupled between a gate of the first MOS transistor and the source of the second MOS transistor, and a fourth capacitance coupled between a gate of the second MOS transistor and the source of the first MOS transistor.

15. The low-noise amplifier circuit of claim 13 further comprising a third capacitance coupled between a gate of the first transistor and the source of the second transistor, and a fourth capacitance coupled between a gate of the second transistor and the source of the first transistor.

16. The low-noise amplifier circuit of claim 13, wherein one or more of the first, second, third, and fourth impedance circuits comprises any combination of a resistance, a capacitance, an inductance, and a transistor.