Limiting power state changes to a processor of a computer device

• US 7,689,851 B2
• Filed: 10/27/2006
• Issued: 03/30/2010
• Est. Priority Date: 10/27/2006
• Status: Active Grant

• Current Assignee: Mosaid Technologies Incorporated (MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management))
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Barlow, Dallas M., Sawyers, Thomas P.
• Primary Examiner(s): Patel, Nitin C
• Application Number:
  US11/588,918
• Publication Number:
  US 20080104436A1
• Time in Patent Office: 1,250 Days
• Field of Search: 713/323
• US Class Current: 713/323
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

One embodiment is a computer device that uses a timer to limit a quantity of changes to different power states that are performed on a processor in the computer device during a predetermined time period. The power states changes each have different operating frequencies for the processor.

Claims

1. A computer device power management system, comprising:

a controller that throttles a processor of a computer device responsive to an overcurrent condition associated with a power source powering the computer device, the controller adjusts a power state of the processor to at least one of a plurality of predetermined power states based on a level of the throttle; and

a timer that limits a quantity of changes to the power states that are performed on the processor during a predetermined time period to limit processing interruptions to the processor.

2. The system of claim 1, wherein each of the predetermined power states comprises a different predetermined operating frequency for the processor.

3. The system of claim 1, wherein the controller limits a quantity of power state transitions of the processor during the predetermined time period.

4. The system of claim 1, wherein the controller generates an averaged overcurrent protection signal indicative of the level of the throttle.

5. The system of claim 4, wherein the controller decrements the processor to at least one of the plurality of predetermined power states if the averaged overcurrent protection signal increases above a predetermined threshold.

6. The system of claim 1, wherein the controller increments the processor to at least one of the plurality of predetermined power states in response to a decreased level of the throttle.

7. The system of claim 1, wherein the controller adjusts the power state after expiration of a timer.

8. The system of claim 1, wherein the timer limits the quantity of changes to the power states to prevent processing interruptions that detrimentally affect performance of the processor.

9. The system of claim 1, wherein the controller comprises a control circuit that generates an averaged overcurrent protection signal indicative of the level of the throttle.

10. A computer device power management method, comprising:

throttling a processor of a computer device in response to an overcurrent condition associated with a power source powering the computer device;

adjusting a power state of the processor to at least one of a plurality of predetermined power states based on a level of the throttle; and

preventing processing interruptions to the processor by limiting a quantity of power state transitions the processor performs during a predetermined time period.

11. The method of claim 10, further comprising generating an averaged overcurrent protection signal indicative of the level of the throttle.

12. The method of claim 10, wherein each of the predetermined power states comprises a different predetermined operating frequency for the processor.

13. The method of claim 10, further comprising using a timer to determine when the processor changes to one of the plurality of predetermined power states.

14. The method of claim 10, wherein adjusting comprises decrementing the processor to at least one of the plurality of predetermined power states if an averaged overcurrent protection signal indicative of the level of the throttle exceeds a predetermined threshold.

15. The method of claim 10, wherein adjusting comprises incrementing the processor to at least one of the plurality of predetermined power states in response to a decreased level of the throttle.

16. The method of claim 10, wherein adjusting comprises adjusting the power state of the processor after expiration of a timer.

17. A computer device power management system, comprising:

means for throttling a processor means of a computer means in response to an overcurrent condition associated with a power means powering the computer means;

means for adjusting a power state of the processor means to at least one of a plurality of predetermined power states based on a level of the throttling; and

means for preventing interruptions to the processor means by limiting a quantity of changes to the predetermined power states that are performed on the processor means during a predetermined time period.

18. The system of claim 17, further comprising means for generating an averaged overcurrent protection signal indicative of the level of the throttling.

19. The system of claim 17, wherein the adjusting means comprises means for decrementing the processor means to at least one of the plurality of predetermined power states if the level of the throttling increases beyond a predetermined threshold.

20. The system of claim 17, wherein the adjusting means comprises means for incrementing the processor means to at least one of the plurality of predetermined power states in response to a decreased level of the throttling.

21. The system of claim 17, wherein the means for preventing interruptions to the processor means limits the quantity of changes to the predetermined power states to prevent processing interruptions that detrimentally affect performance of the processor means.

22. A computer storing executable instructions that are executed by a processor in the computer to perform a method, comprising:

throttling of a processor of a computer device responsive to an overcurrent condition associated with a power source powering the computer device, the controller adjusts a power state of the processor to at least one of a plurality of predetermined power states based on a level of the throttle; and

using a timer to prevent processing interruptions to the processor by limiting a quantity of transitions to the predetermined power states that the processor performs during a predetermined time period.