Method and system for level detector calibration for accurate transmit power control
First Claim
1. A method for controlling a circuit within a transmitter, the method comprising:
- cancelling a zero input offset voltage of a level detector integrated on a chip utilizing a replica bias circuit;
calibrating said level detector over a range of input values utilizing a known temperature and supply-voltage independent voltage level; and
controlling an output power of the transmitter based on a corrected level of said level detector.
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Accused Products
Abstract
Methods and systems for level detector calibration are disclosed and may comprise calibrating a level detector integrated on-chip to eliminate an associated zero input offset voltage utilizing a replica bias circuit with no input ac voltage at the level detector or the replica bias circuit. The offset voltages of the level detector and the replica bias circuit may be combined to eliminate the associated zero input offset voltage of the level detector. The output signal may be generated by a difference of output signals from the level detector and the replica bias circuit. The level detector and the replica bias circuit may be biased utilizing a similar bias voltage. A plurality of known input voltages may be utilized to generate a corresponding plurality of output voltages of the level detector, generating a corrected transfer function that may be used to accurately set a transmitter power level.
12 Citations
22 Claims
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1. A method for controlling a circuit within a transmitter, the method comprising:
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cancelling a zero input offset voltage of a level detector integrated on a chip utilizing a replica bias circuit; calibrating said level detector over a range of input values utilizing a known temperature and supply-voltage independent voltage level; and controlling an output power of the transmitter based on a corrected level of said level detector. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A system for controlling a circuit within a transmitter, the system comprising:
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one or more circuits comprising a replica bias circuit that cancels a zero input offset voltage of a level detector integrated on a chip; said one or more circuits calibrates said level detector over a range of input values utilizing a known temperature and supply-voltage independent voltage level; and said one or more circuits controls an output power of the transmitter based on a corrected level of said level detector. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification