Data communication device has data signal generation circuit and transmission circuit on basis of reference voltage and received signal

• US 7,734,940 B2
• Filed: 03/16/2007
• Issued: 06/08/2010
• Est. Priority Date: 04/18/2006
• Status: Expired due to Fees

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Yamazaki, Yoshikazu
• Primary Examiner(s): Cao; Chun
• Application Number:
  US11/687,233
• Publication Number:
  US 20070288780A1
• Time in Patent Office: 1,180 Days
• Field of Search: 713/322, 713/300, 375/220, 375/256
• US Class Current: 713/322
• CPC Class Codes: H03K 19/003 Modifications for increasing the reliability for protection
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation
• CPC Class Codes: H04L 25/08 Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults

Abstract

A data communication device performs stable data communications without a malfunction in a system downsized by realizing bi-directional data communications using two terminals. The data communication device includes: a signal terminal (IN) for inputting a received signal having portions of different duty ratios and a constant pulse frequency; a reference voltage terminal (GND) for inputting a first reference voltage; a clock generation circuit for generating a clock signal according to the received signal; a data signal generation circuit for generating a data signal by identifying a duty ratio of the received signal; a transmission circuit for outputting a transmission signal to the signal terminal; and a regulator circuit for generating power supply voltages of the clock generation circuit, the data signal generation circuit, and the transmission circuit on a basis of an internally generated second reference voltage, the received signal, and the first reference voltage.

Claims

1. A data communication device, comprising:

a signal terminal for inputting a received signal having portions of different duty ratios and a constant pulse frequency;

a reference voltage terminal for inputting a first reference voltage;

a clock generation circuit for generating a clock signal according to the received signal;

a data signal generation circuit for generating a data signal by identifying a duty ratio of the received signal;

a transmission circuit for outputting a transmission signal to the signal terminal;

a regulator circuit for generating power supply voltages of the clock generation circuit, the data signal generation circuit, and the transmission circuit on a basis of an internally generated second reference voltage, the received signal, and the first reference voltage; and

a reference voltage circuit for generating the second reference voltage; and

a level shift circuit for level-shifting a pulse of the received signal on a basis of a threshold correlated with the second reference voltage,

wherein the regulator circuit generates a power supply voltage correlated with the second reference voltage, and there is a correlation between the threshold and the power supply voltage.

2. The data communication device according to claim 1, wherein the transmission circuit outputs the transmission signal only in a high level period of the received signal.

3. The data communication device according to claim 1, further comprising a capacitor for holding a power supply voltage generated by the regulator circuit.

4. The data communication device according to claim 1, wherein the level shift circuit level-shifts the received signal to a pulse of the power supply voltage and the first reference voltage.

5. The data communication device according to claim 1, wherein:

the transmission circuit comprises a current control circuit, connected to the signal terminal, for controlling whether or not a constant current is to be passed according to a constant current control signal for outputting of the transmission signal to the signal terminal; and

the current control circuit comprises;

a delay circuit for delaying the constant current control signal; and

a control circuit for controlling whether or not a constant current is to be passed on a basis of the delayed constant current control signal.

6. The data communication device according to claim 1, wherein the clock generation circuit comprises:

a level shift circuit for level-shifting the received signal;

a frequency division circuit for frequency-dividing the level-shifted signal;

a delay circuit for delaying the frequency-divided signal; and

a logical arithmetic circuit for performing a logical operation on a basis of an output signal of the frequency division circuit and an output signal of the delay circuit, and for outputting a clock signal.

7. The data communication device according to claim 6, wherein the delay circuit comprises:

a capacitor for performing charging and discharging according to an input signal; and

a comparator circuit for comparing a voltage of the capacitor with a threshold voltage, and outputting a signal obtained by delaying the input signal.

8. The data communication device according to claim 7, wherein

the delay circuit comprises:

a current setting circuit for passing a current; and

a charge/discharge control circuit for configuring the current setting circuit and a current mirror, and performing charging and discharging on the capacitor according to the input signal.

9. The data communication device according to claim 8, wherein:

a threshold voltage of the comparator circuit is a voltage correlated with the power supply voltage; and

the current setting circuit passes a current correlated with the power supply voltage.

10. The data communication device according to claim 1, wherein the reference voltage circuit is a band gap reference voltage generation circuit for generating a band gap reference voltage as the second reference voltage.

11. The data communication device according to claim 6, wherein:

the delay circuit comprises;

a charge/discharge current setting circuit for setting a charge/discharge current;

a charge/discharge control circuit for receiving an output signal from the frequency division circuit and controlling charge and discharge;

a delay time setting capacitor for setting a delay time according to an output signal from the charge/discharge control circuit; and

a voltage detection circuit for detecting a voltage value of the delay time setting capacity,

the charge/discharge current setting circuit sets a current correlated with an output voltage of the regulator circuit, and

the voltage detection circuit detects a voltage value of the delay time setting capacity using a threshold correlated with an output voltage of the regulator circuit.

12. A data communication device, comprising:

a signal terminal for inputting a received signal;

a reference voltage terminal for inputting a first reference voltage;

a clock generation circuit for generating a clock signal according to the received signal;

a data signal generation circuit for generating a data signal according to the received signal;

a transmission circuit for receiving the clock signal and the data signal and outputting a transmission signal to the signal terminal;

a regulator circuit for generating power supply voltages of the clock generation circuit, the data signal generation circuit, and the transmission circuit on a basis of an internally generated second reference voltage, the received signal, and the first reference voltage;

a reference voltage circuit for generating the second reference voltage; and

a level shift circuit for level-shifting a pulse of the received signal on a basis of a threshold correlated with the second reference voltage,

wherein the regulator circuit generates a power supply voltage correlated with the second reference voltage, and there is a correlation between the threshold and the power supply voltage.

13. A data communication system in which a first data communication device and a second data communication device are connected through at least a signal terminal, wherein

the first data communication device comprises:

a voltage amplitude modulation circuit for outputting a signal having portions of different duty ratios and a constant pulse frequency to the second data communication device through the signal terminal on a basis of data; and

a current detection circuit for generating a data signal on a basis of a current running through the signal terminal, and

the second data communication device comprises;

a signal terminal for inputting from the first data communication device the signal having portions of different duty ratios and a constant pulse frequency as a received signal;

a reference voltage terminal for inputting a first reference voltage;

a clock generation circuit for generating a clock signal according to the received signal;

a data signal generation circuit for generating a data signal by identifying a duty ratio of the received signal;

a transmission circuit for outputting a transmission signal to the signal terminal;

a regulator circuit for generating power supply voltages of the clock generation circuit, the data signal generation circuit, and the transmission circuit on a basis of an internally generated second reference voltage, the received signal, and the first reference voltage,

a reference voltage circuit for generating the second reference voltage; and

a level shift circuit for level-shifting a pulse of the received signal on a basis of a threshold correlated with the second reference voltage,

wherein the regulator circuit generates a power supply voltage correlated with the second reference voltage, and there is a correlation between the threshold and the power supply voltage.

14. A data communication method, comprising steps of:

inputting to a signal terminal a received signal having portions of different duty ratios and a constant pulse frequency;

inputting a first reference voltage to a reference voltage terminal;

generating a clock signal according to the received signal;

generating a data signal by identifying a duty ratio of the received signal;

outputting a transmission signal to the signal terminal;

generating power supply voltages on a basis of an internally generated second reference voltage, the received signal, and the first reference voltage;

generating the second reference voltage; and

level-shifting a pulse of the received signal on a basis of a threshold correlated with the second reference voltage,

wherein the step of generating power supply voltages generates a power supply voltage correlated with the second reference voltage, and there is a correlation between the threshold and the power supply voltage.