Method of forming fine pattern, liquid crystal device having a fine pattern and fabricating method thereof

• US 7,738,071 B2
• Filed: 06/23/2006
• Issued: 06/15/2010
• Est. Priority Date: 06/30/2005
• Status: Expired due to Fees

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Nam, Seung Hee, Kwon, Oh Nam, Yoo, Soon Sung, Cho, Heung Lyul
• Primary Examiner(s): Nguyen; Dung
• Assistant Examiner(s): DUONG, TAI V
• Application Number:
  US11/473,590
• Publication Number:
  US 20070001979A1
• Time in Patent Office: 1,453 Days
• Field of Search: 349/141, 349/187, 438/30, 216/23, 216/24, 216/42, 216/101, 216/108, 430/5, 430/321
• US Class Current: 349/187
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 2201/123 pixel

Abstract

This invention relates to a method of forming fine pattern that is adaptive for forming a fine pattern without limit of an exposure resolution, a liquid crystal display device and a fabricating method. The method of forming fine pattern comprises forming a photo-resist pattern on a transparent conductive layer. The photo-resist pattern having a minimum line width corresponding to an exposure resolution of an exposure device. The method further comprises over-etching the transparent conductive layer by an etching process using the photo-resist pattern as a mask to form an electrode pattern having a line width narrower than the exposure resolution of the exposure device.

Claims

1. A method of forming fine pattern, comprising:

forming a photo-resist pattern on a conductive layer, the photo-resist pattern having a minimum line width corresponding to an exposure resolution of an exposure device; and

over-etching the conductive layer by an etching process using the photo-resist pattern as a mask to form an electrode pattern having a line width narrower than the exposure resolution of the exposure device,

wherein the step of over-etching the conductive layer performs etching so that a etching CD (Critical Dimension) bias between the photo-resist pattern and the electrode pattern is approximately 0.4˜

3 μ

m,

wherein a temperature of the etching process is between about 50°

C. and about 70°

C., and

wherein an etching process time is between about 100 seconds and about 300 seconds.

2. The method as claimed in claim 1, wherein the electrode pattern has an approximately 1˜

3.5 μ

m line width.

3. The method as claimed in claim 1, wherein the conductive layer includes a transparent conductive layer.

4. The method as claimed in claim 1, wherein the conductive layer includes ITO.

5. The method as claimed in claim 1, wherein the conductive layer includes at least one of a common electrode and a pixel electrode formed in the electrode pattern with an approximately 1˜

1.6 μ

m line width.

6. The method as claimed in claim 1, wherein an etchant for etching the conductive layer includes an oxalic acid of 2 wt %˜

10 wt % and a surfactant.

7. The method as claimed in claim 6, wherein the etchant is provided in a spray mode.

8. A method of fabricating a liquid crystal display device,

forming a conductive layer;

forming a photo-resist pattern on the conductive layer, the photo-resist pattern including a portion having a minimum line width corresponding to an exposure resolution of an exposure device; and

over-etching the conductive layer by an etching process using the photo-resist pattern as a mask to form an electrode pattern having a line width narrower than the exposure resolution of the exposure device,

wherein the step of over-etching the conductive layer performs etching so that a etching CD (Critical Dimension) bias between the photo-resist pattern and the electrode pattern is an approximately 0.4˜

3 μ

m,

wherein a temperature of the etching process is between about 50°

C. and about 70°

C., and

wherein an etching process time is between about 100 seconds and about 300 seconds.

9. The method as claimed in claim 8, wherein the electrode pattern has an approximately 1˜

3.5 μ

m line width.

10. The method as claimed in claim 8, wherein the conductive layer includes a transparent conductive layer.

11. The method as claimed in claim 10, wherein the conductive layer includes ITO.

12. The method as claimed in claim 8, wherein an etchant for etching the conductive layer includes an oxalic acid of 2 wt %˜

10 wt % and a surfactant.

13. The method as claimed in claim 12, wherein the etchant is provided in a spray mode.

14. The method as claimed in claim 8, wherein the conductive layer includes at least one of a common electrode and a pixel electrode formed in the electrode pattern with an approximately 1˜

1.6 μ

m line width.

15. The method as claimed in claim 14, wherein the common electrode and the pixel electrode form a horizontal electric field.