Calibration methods and circuits to calibrate drive current and termination impedance

• US 7,741,868 B2
• Filed: 07/20/2009
• Issued: 06/22/2010
• Est. Priority Date: 09/08/2003
• Status: Expired due to Fees

• Current Assignee: Rambus Inc.
• Original Assignee: Rambus Inc.
• Inventors: Nguyen, Huy M., Gadde, Vijay, Lau, Benedict
• Primary Examiner(s): CHO, JAMES HYONCHOL
• Application Number:
  US12/506,074
• Publication Number:
  US 20090278565A1
• Time in Patent Office: 337 Days
• Field of Search: 326/30, 326 26- 27
• US Class Current: 326/30
• CPC Class Codes: H03K 19/0005 Modifications of input or output impedance
• CPC Class Codes: H03K 19/01 Modifications for accelerating switching
• CPC Class Codes: H03K 21/08 Output circuits
• CPC Class Codes: H03K 5/24 the characteristic being amplitude
• CPC Class Codes: H04L 25/0278 Arrangements for impedance matching
• CPC Class Codes: H04L 25/0298 Arrangement for terminating transmission lines

Abstract

Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines. An ODT control system in accordance with one embodiment calibrates and maintains termination resistances and drive currents to produce optimal output swing voltages. Comparison circuitry employed to calibrate the reference resistance is also used to calibrate the drive current. Termination elements in some embodiments are divided into two adjustable resistive portions, both of which are designed to minimize capacitive loading. One portion is optimized to produce a relatively high range of adjustment, while the other is optimized for fine-tuning and glitch-free switching.

Claims

1. A method of calibrating a transmitter on an integrated circuit device, the integrated circuit device including, a current source, a comparator and an input to couple to an external reference termination element, the method comprising:

calibrating a reference termination resistance using the external reference termination element using a first output from the comparator; and

calibrating a reference current through the current source using a second output from the comparator;

wherein errors exhibited by the comparator that increase the reference termination resistance decrease the reference current.

2. The method of claim 1, wherein calibrating the reference termination resistance includes drawing a first current through a reference resistor to produce a first voltage, drawing a second current through the external reference termination element to produce a second voltage, and comparing the first and second voltages using the comparator.

3. The method of claim 1, wherein calibrating the reference current includes drawing the reference current through the external reference resistor to produce a first voltage and comparing the first voltage with a reference voltage using the comparator.

4. The method of claim 1, wherein the integrated circuit device includes an adjustable termination element, wherein calibrating the reference termination resistance generates a resistance-offset value, and wherein the method further comprises adjusting the adjustable termination element in response to the resistance-offset value.

5. The method of claim 1, wherein the integrated circuit device includes an adjustable driver, wherein calibrating the reference current generates a current-offset value, and wherein the method further comprises adjusting a drive current through the adjustable driver in response to the current-offset value.

6. The method of claim 1, wherein the transmitter is one of a plurality of transmitters on the integrated circuit device, each transmitter of the plurality of transmitters exhibiting a drive current and having a termination element, the method further comprising adjusting the drive current of each transmitter in proportion to the reference current and the termination element of each transmitter in proportion to the reference termination resistance.

7. An integrated circuit comprising:

a transmitter having a termination resistance and supporting a drive current to transmit a signal having a signal swing, wherein the signal swing is a product of the termination resistance and the drive current; and

a calibration circuit coupled to the transmitter, the calibration circuit to establish control values that calibrate the drive current and the termination resistance, the calibration circuit including;

a comparator having a comparator output terminal that provides a signal exhibiting an offset error;

a reference current source coupled to the comparator output terminal to pass a reference current proportional to the drive current; and

an adjustable reference resistor coupled to the comparator output terminal to exhibit a reference resistance proportional to the termination resistance, wherein the reference resistance is modified by the signal exhibiting the offset error, such that the reference resistance increases with the signal exhibiting the offset error if the reference current decreases and decreases with the signal exhibiting the offset error if the reference current increases.

8. The integrated circuit of claim 7, wherein the signal swing remains constant with changes in the signal exhibiting the offset error.

9. The integrated circuit of claim 7, wherein the comparator has first and second comparator input terminals, the first comparator input terminal to connect to a resistor external to the integrated circuit.

10. The integrated circuit of claim 9, wherein the calibration circuit further includes a multiplexer having first and second multiplexer input terminals and a multiplexer output terminal connected to the second comparator input terminal.

11. The integrated circuit of claim 10, wherein the first multiplexer input terminal is to couple to a voltage reference external to the integrated circuit.

12. The integrated circuit of claim 11, wherein the second multiplexer input terminal is coupled to the reference resistor.

13. The integrated circuit of claim 12, wherein the second multiplexer input terminal is coupled to the reference current source.

14. An on-die-termination (ODT) control system comprising:

a comparator having first and second comparator input terminals and a comparator output terminal;

a first counter coupled to the comparator output terminal to store a first value representative of an ODT resistance offset; and

a second counter coupled to the comparator output terminal to store a second value representative of a drive-current offset.

15. The ODT control system of claim 14, wherein the resistance offset changes in inverse proportion to the drive-current offset.

16. The ODT control system of claim 14, further comprising a reference current source coupled to and controlled by the second counter to pass a drive current, having the drive-current offset, from a reference node coupled to the first comparator input terminal.

17. The ODT control system of claim 14, further comprising a reference resistor coupled to and controlled by the ODT counter to exhibit a reference resistance, including the resistance offset.

18. A method of calibrating a transmitter on an integrated circuit device, the method comprising:

drawing a reference current through a reference resistor to produce a first voltage;

drawing a second current through an external reference termination element to produce a second voltage;

comparing the first and second voltages to calibrate a reference termination resistance; and

drawing the reference current through a reference resistor to produce a third voltage and comparing the third voltage with a reference voltage to calibrate a driver current of the transmitter;

wherein offset errors exhibited by the comparator that increase the reference termination resistance decrease the reference current.

19. An integrated circuit comprising:

a pad to couple to an external resistor;

a first current source, coupled to the pad, to develop a first voltage by drawing a first current through the external resistor;

a first plurality of register bits, coupled to the first current source, to store a first value that calibrates the first current of the first current source, wherein the first value is based on a first comparison between the first voltage and a reference voltage;

a second current source that is controlled based on the first value;

a digitally adjustable resistor, coupled to the second current source, wherein a second voltage is developed by drawing a second current through the digitally adjustable resistor and the second current source;

a second plurality of register bits, coupled to the digitally adjustable resistor, to store a second value that calibrates an impedance setting of the digitally adjustable resistor, wherein the second value is based on a second comparison between the second voltage and the reference voltage; and

a plurality of drivers to transmit data, wherein, for each driver of the plurality of drivers, at least one of a drive current and a termination resistance is set based on the first value and the second value.

20. The integrated circuit of claim 19, further comprising a comparator having a first input coupled to the pad, a second input, and an output coupled to the first plurality of register bits.

21. The integrated circuit of claim 20, further comprising a multiplexer having a first multiplexer input coupled to the reference voltage, a second multiplexer input coupled to the digitally adjustable resistor, and a multiplexer output coupled to the second input of the comparator.

22. The integrated circuit of claim 20, wherein the comparator output is coupled to the second plurality of register bits.

23. The integrated circuit of claim 19, further comprising a second pad to receive the reference voltage.