Stored memory recovery system

• US 7,783,923 B2
• Filed: 04/30/2009
• Issued: 08/24/2010
• Est. Priority Date: 10/19/1999
• Status: Expired due to Term

• Current Assignee: Xylon LLC (Intellectual Ventures LLC)
• Original Assignee: Idocrase Investments LLC (Intellectual Ventures LLC)
• Inventors: Jian, Zhang, Sun, Hanxiang, Murray, Timothy John, Vohariwatt, Janet, Shen, Andrew W.
• Primary Examiner(s): Beausoliel; Robert
• Assistant Examiner(s): Mehrmanesh; Elmira
• Application Number:
  US12/433,774
• Publication Number:
  US 20090276662A1
• Time in Patent Office: 481 Days
• Field of Search: 714/5, 714/8, 714/15, 714/19, 714/20
• US Class Current: 714/20
• CPC Class Codes: G06F 11/1435 using file system or storage system metadata
• CPC Class Codes: G06F 11/2087 with a common controller

Abstract

Various embodiments of systems and methods for preserving saved memory states to which a computer system can be restored are disclosed. In certain embodiments, the systems and methods intercept write operations to protected memory locations and redirect them to alternate memory locations. Embodiments of the systems and methods include creation of a table for each memory state. Certain embodiments additionally include a recovery capability, by which the protected memory in the computer system is capable of being restored or recovered to a recovery point that represents a saved memory state. Further embodiments relate to systems and methods for preventing protected memory locations from being overwritten that utilize a plurality of memory state values.

Claims

1. A computer-implemented method comprising:

creating a first recovery point that is configured to confer a protected status on data stored in memory in association with the first recovery point, wherein the first recovery point remains until initiation of deletion of the first recovery point; and

redirecting a write request from a first memory location that stores data associated with the first recovery point to a second memory location.

2. The computer-implemented method recited in claim 1, wherein the second memory location corresponds to a second recovery point that remains until initiation of deletion of the second recovery point, wherein the second recovery point is configured to confer protected status on data stored in the memory in association with the second recovery point.

3. The computer-implemented method as recited in claim 2, further comprising deleting the second recovery point while preserving the data stored in the memory in association with the first recovery point so the first recovery point is usable to restore a computer system that implements the computer-implemented method to a state associated with the first recovery point.

4. The computer-implemented method as recited in claim 3, further comprising restoring the computer system to the state associated with the first recovery point.

5. The computer-implemented method as recited in claim 2, further comprising deleting the first recovery point while preserving the data stored in the memory in association with the second recovery point, the data stored in memory in association with the second recovery point being usable to restore a computer system to a state that is associated with the second recovery point.

6. The computer-implemented method as recited in claim 1, further comprising redirecting a subsequent write request from the second memory location to a third memory location, the second memory location being associated with a second recovery point and the third memory location being associated with a third recovery point, the third recovery point configured to restore a computer system to a state that is associated with the third recovery point independent of deletion of one or more of the first or second recovery points.

7. The computer-implemented method as recited in claim 1, wherein a relationship between the first memory location and the second memory location is indicated in a table that is transparent to a file system executing on a computer system that is to perform the computer-implemented method.

8. A computer-implemented method comprising:

comparing an address for a first location in memory with a table to determine whether the first location is identified as protected in the table;

redirecting a write access command from the first location to a second location in memory, responsive to a determination that the second location is not identified as protected in the table and the first location is identified as protected in the table;

comparing the address of the first location with the table to determine whether the first location is identified as protected, responsive to receipt of a subsequent write access command directed to the first location; and

redirecting the subsequent write access command from the first location to a third location in the memory responsive to a determination that the third location is not identified as protected in the table and the first location is identified as protected in the table.

9. The computer-implemented method as recited in claim 8, further comprising:

updating the table to indicate a relationship between the first location and the second location in response to redirecting the write access command to the second location; and

substituting a relationship between the first and third locations for the relationship between the first and second locations in the table.

10. The computer-implemented method as recited in claim 9, wherein the updating the table comprises creating a new table that is a copy of the table with the second location substituted for the first location.

11. The computer-implemented method as recited in claim 8, wherein the table comprises a file allocation table.

12. The computer-implemented method as recited in claim 8, wherein locations in the memory that are not protected do not include data at a point in time when a determination of the locations'"'"' protected status is made.

13. The computer-implemented method as recited in claim 8, wherein the table is transparent to a file system executing on a computing system that performs the computer-implemented method.

14. An apparatus comprising:

memory embodying processor-executable instructions;

one or more processors coupled to memory, the processor-executable instructions being executable to cause the apparatus to;

create a first recovery point in the memory that confers a protected status on data stored in a first group of memory locations;

redirect a write request from a memory location within said first group of memory locations to a different location in the memory that is not associated with the first recovery point;

create a second recovery point in the memory that corresponds to a second group of memory locations that includes the different location, wherein the second recovery point is usable to confer protected status on data from the write request stored in the second group of memory locations; and

independently recover the apparatus through use of the data in said first group of memory locations or the data stored in the second group of memory locations.

15. The apparatus as recited in claim 14, wherein the instructions are further executable, by said processors, to cause the apparatus to restore itself to a state that corresponds to the first recovery point or the second recovery point independent of deletion of other recovery points in the memory at a point in time at which the apparatus is recovered to the state.

16. The apparatus as recited in claim 14, wherein the memory comprises a local storage device.

17. The apparatus as recited in claim 14, wherein the instructions are further executable, by said processors, to cause the apparatus to maintain a file allocation table to track entries that indicate addressable locations in the memory for the first group of memory locations and the second group of memory locations and redirect a subsequent write request to an addressable location included in a third group of memory locations.

18. The apparatus as recited in claim 17, wherein the file allocation table is transparent to a file system configured to execute on the apparatus.

19. The apparatus as recited in claim 18, wherein the instructions are further executable, by said processors, to cause the apparatus to create a table that indicates a relationship between the addressable location in the memory that is associated with the first recovery point and an addressable location in the memory that is associated with the third recovery point at which the subsequent write request is to be stored.

20. The apparatus as recited in claim 14, wherein the instructions are further executable, by said processors, to cause the apparatus to create a third recovery point in memory that is configured to confer a protected status on data stored in a third group of memory locations responsive to reception of a subsequent write request directed to an addressable location in the memory that is associated with the first recovery point.