Wide-band voltage controlled oscillator

• US 7,800,458 B2
• Filed: 09/10/2008
• Issued: 09/21/2010
• Est. Priority Date: 09/11/2007
• Status: Expired due to Fees

• Current Assignee: Solum Co., Ltd.
• Original Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Inventors: Eo, Yunseong, Lee, Soowoong, Kim, Jongsik, Shin, Hyunchol
• Primary Examiner(s): KINKEAD, ARNOLD M
• Application Number:
  US12/208,019
• Publication Number:
  US 20090066431A1
• Time in Patent Office: 741 Days
• Field of Search: 331/177.FE, 331/117.R, 331/177.V, 331/34, 331/16, 331/177.R
• US Class Current: 331/177.00V
• CPC Class Codes: H03B 5/1852 the semiconductor device being a field-effect device
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/10 for assuring initial synchronisation or for broadening the capture range

Abstract

A wide-band voltage controlled oscillator includes a cross-connected transistors for providing a stable oscillating signal, an inductor unit for providing an inductance for determining a resonance frequency, a varactor bank including a plurality of switchable variable-capacitance elements parallely connected to the inductor unit and having a varactor capacitance varying with the first switching signal and a tuning voltage, a subsection capacitor bank including a plurality of switchable capacitor elements parallely connected to the inductor unit and having predetermined capacitances for grouping frequency sections, and a binary-weighted capacitor bank including a plurality of binary-weighted capacitor arrays parallely connected to the inductor unit and a bank selector for selecting one of the binary-weighted capacitor arrays, wherein each binary-weighted capacitor arrays includes a plurality of parallely connected switchable capacitor elements selectively switched on by a third switching signal to determine a variable weighted capacitance of the tunable binary-weighted capacitor bank.

Claims

1. A wide-band voltage controlled oscillator comprising:

a cross-connected oscillator configured to provide an oscillating signal;

an inductor unit configured to provide inductance for determining a resonance frequency of the oscillating signal;

a varactor bank comprising a plurality of switchable variable-capacitance elements which are connected to the inductor unit in parallel and have predetermined varactor capacitances, wherein one of the plurality of switchable variable-capacitance elements is selected by a first switching signal so that the varactor bank has a variable capacitance varying with a tuning voltage;

a subsection capacitor bank comprising a plurality of switchable capacitor elements connected to the inductor unit in parallel, having predetermined capacitances for fractionized frequency sections, and selectively switched on by a second switching signal so that the subsection capacitor bank has a variable capacitance for the fractionized frequency sections; and

a binary-weighted capacitor bank comprising a plurality of binary-weighted capacitor banks connected to the inductor unit in parallel and a bank selector configured to select one of the plurality of binary-weighted capacitor banks according to a bank selection signal, wherein each of the binary-weighted capacitor banks comprises a plurality of switchable capacitor elements which are connected in parallel to one another and selectively switched on by a third switching signal so that the binary-weighted capacitor bank has a variable binary-weighted capacitance,

wherein the ratio of the variable capacitance of the varactor bank to the total capacitance of the subsection capacitor bank and the binary-weighted capacitor bank is kept constant for a plurality of predetermined frequency sections comprising a first frequency section, a second frequency section, a third frequency section and a fourth frequency section,

wherein the total capacitance of the subsection bank and the binary-weighted capacitor bank is further set to vary in a nearly exponential way according to a digital control signal.

2. The wide-band voltage controlled oscillator of claim 1, wherein a variation rate of the varactor capacitance by the varactor capacitor bank is set to be identical to a total variation rate of the total capacitance by the subsection capacitor bank and the binary weighted capacitor bank.

3. The wide-band voltage controlled oscillator of claim 2, wherein the negative transconductance generation unit comprises:

a cross-coupled PMOS transistor pair comprising a pair of PMOS transistors and the source nodes of PMOS transistors are connected to a power supply voltage, wherein a gate and a drain of one PMOS transistor are connected to a drain and a gate of the other PMOS transistor, respectively; and

a cross-coupled NMOS transistor pair comprising a pair of NMOS transistors and the source nodes of NMOS transistor are connected to a ground voltage, wherein a gate and a drain of one of the pair of NMOS transistors are connected to a drain and a gate of the other NMOS transistor, respectively.

4. The wide-band voltage controlled oscillator of claim 3, wherein each of the plurality of switchable variable-capacitance elements in the varactor bank comprises:

at least one varactor (or variable capacitor) having capacitance varying with the tuning voltage; and

a switch connected between the common-node of varactors which applies the tuning voltage to the varactor according to the first switching signal.

5. The wide-band voltage controlled oscillator of claim 2, wherein each of the plurality of switchable capacitor elements in the subsection capacitor bank comprises:

at least one capacitor; and

a switch serially connected to the capacitor and turned on by the second switching signal.

6. The wide-band voltage controlled oscillator of claim 2, wherein each of the plurality of switchable capacitor elements of the binary-weighted capacitor arrays in the tunable binary-weighted capacitor bank comprises:

at least one capacitor; and

a switch serially connected to the capacitor and turned on by the third switching signal.

7. The wide-band voltage controlled oscillator of claim 2, further comprising an encoder configured to generate the first switching signal, the second switching signal, the bank selection signal and the third switching signal using a digital control signal.

8. The wide-band voltage controlled oscillator of claim 7, wherein the encoder divides the digital signal into an upper bit to generate the first switching signal, the second switching signal and the bank selection signal and a lower bit to generate the third switching signal.

9. The wide-band voltage controlled oscillator of claim 8, wherein the encoder comprises:

a first encoder configured to generate a first 3-bit switching signal by using upper two bits of a 6-bit digital control signal;

a second encoder configured to generate the second bit switching signal by using the upper two bits; and

a third encoder configured to generate a 4-bit bank selection signal by using the upper two bits.

10. The wide-band voltage controlled oscillator of claim 9, wherein the varactor bank comprises the first to the fourth switchable variable-capacitance elements selected by the first 3-bits switching signal.

11. The wide-band voltage controlled oscillator of claim 10, wherein the subsection capacitor bank comprises the first to the third switchable capacitor elements selected by the second 3-bit switching signal.

12. The wide-band voltage controlled oscillator of claim 11, wherein the binary-weighted capacitor bank comprises the first to the fourth binary-weighted capacitor banks, and

the bank selector selects one of the binary-weighted capacitor banks according to the 4-bit bank selection signal to deliver lower four bits of the 6-bit digital control signal to the selected binary-weighted capacitor bank.

13. The wide-band voltage controlled oscillator of claim 9, wherein the first encoder generates the first switching signal comprising a first signal, a second signal and a third signal by using the upper two bits.

14. The wide-band voltage controlled oscillator of claim 13, wherein the first encoder comprises:

an OR gate configured to perform logic-OR operation on the upper two bits to generate the first signal of the first switching signal; and

an AND gate configured to perform logic-AND operation on the upper two bits to generate the third signal of the first switching signal, and

the first encoder delivers an uppermost bit of the upper two bits as the second signal of the first switching signal.

15. The wide-band voltage controlled oscillator of claim 9, wherein the second encoder generates the second switching signal comprising a first signal, a second signal and a third signal using the upper two bits.

16. The wide-band voltage controlled oscillator of claim 15, wherein the second encoder comprises:

an OR gate configured to perform logic-OR operation on the upper two bits to generate the first signal of the second switching signal; and

an AND gate configured to perform logic-AND operation on the upper two bits to generate the third signal of the second switching signal, and

the second encoder delivers an uppermost bit of the upper two bits as the second signal of the second switching signal.

17. The wide-band voltage controlled oscillator of claim 9, wherein the third encoder comprises:

a first inverter configured to invert an uppermost bit of the 6-bit digital control signal;

a second inverter configured to invert a second uppermost bit of the 6-bit digital control signal;

a first AND gate configured to perform logic-AND operation on output signals of the first and second inverters to generate a first signal;

a second AND gate configured to perform logic-AND operation on the output signal of the first inverter and the second uppermost bit to generate a second signal;

a third AND gate configured to perform logic-AND operation on the uppermost bit of the 6-bit digital control signal and the output signal of the second inverter to generate a third signal; and

a fourth AND gate configured to perform logic-AND operation on the uppermost bit of the 6-bit digital control signal and the second uppermost bit to generate a fourth signal.