Automated systems and methods for adapting semiconductor fabrication tools to process wafers of different diameters

• US 7,824,146 B2
• Filed: 09/07/2007
• Issued: 11/02/2010
• Est. Priority Date: 09/07/2007
• Status: Expired due to Fees

• Current Assignee: Suzhou Technology Institute For Nanotech Industry
• Original Assignee: Advanced Technology Development Facility Incorporated (SVTC Technologies, LLC)
• Inventors: Lanee, Khamsidi, Moore, Gerry
• Primary Examiner(s): Rodríguez; Saúl J
• Assistant Examiner(s): Snelting; Jonathan D
• Application Number:
  US11/851,663
• Publication Number:
  US 20090067954A1
• Time in Patent Office: 1,152 Days
• Field of Search: 414804-805
• US Class Current: 414/804
• CPC Class Codes: H01L 21/68721 characterised by edge clamping, e.g. clamping ring
• CPC Class Codes: H01L 21/68742 characterised by a lifting arrangement, e.g. lift pins

Abstract

Automated systems and methods for adapting semiconductor fabrication tools to process wafers of different diameters are described. In one embodiment, a method comprises providing a semiconductor fabrication tool, placing an adapter ring on a plurality of ring holders via a robotic arm, the plurality of ring holders being operable to support the adapter ring at a vertical distance from a stage heater and the stage heater being movable in a vertical direction, placing a first semiconductor wafer on the stage heater via the robotic arm, the first semiconductor wafer having a first diameter, and moving the stage heater upward to receive the adapter ring from the plurality of ring holders and to cover a portion of the stage heater during processing of the first semiconductor wafer.

Claims

1. A method comprising:

providing a semiconductor fabrication tool comprising a stage heater having a plurality of wafer lifts, a baffle surrounding the stage heater and having a plurality of ring lifts, and an arm lift having a plurality of wafer lift pins and a plurality of ring lift pins, the plurality of ring lift pins being aligned with the plurality of ring lifts and the plurality of wafer lift pins being aligned with the plurality of wafer lifts;

moving the arm lift upward to cause the plurality of ring lift pins to raise the plurality of ring lifts and to cause the plurality of wafer lift pins to raise the plurality of wafer lifts;

placing an adapter ring on the plurality of ring lifts via a robotic arm;

placing a first semiconductor wafer having a first diameter on the plurality of wafer lifts via the robotic arm;

moving the arm lift downward to lower the plurality of wafer lifts and the plurality of ring lifts, thus resting the first semiconductor wafer and adapter ring on a surface of the stage heater, the adapter ring covering a portion of the stage heater,

removing the first semiconductor wafer from the plurality of wafer lifts via the robotic arm;

removing the adapter ring from the plurality of ring lifts via the robotic arm;

placing a second semiconductor wafer on the plurality of wafer lifts via the robotic arm, the second semiconductor wafer having a second diameter greater than the first diameter; and

moving the arm lift downward to place the second semiconductor wafer on the surface of the stage heater.

2. The method of claim 1, further comprising maintaining a vacuum chamber of the semiconductor fabrication tool closed, the vacuum chamber comprising the stage heater.