Adaptive and reconfigurable system for DC motor control
First Claim
1. An integrated circuit for controlling at least one motor comprising:
- at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the at least one motor, the at least one DPS being in signal communication with the at least one motor for receiving a pair of signals having a quadrature relationship;
at least one programmable gain amplifier (PGA) electrically coupled to the at least one motor, the PGA being configured to receive a feedback signal indicative of current flowing through the at least one motor and to apply a second signal to the at least one motor for adjusting the speed of the at least one motor;
wherein the at least one DPS is configured to measure the speed of the at least one motor based on one of frequency counting and period counting;
wherein frequency counting is implemented by counting a number of pulses from the pair of signals having a quadrature relationship that occur within a fixed time window;
wherein the circuitry for measuring the speed of the at least one motor based on frequency counting comprises;
a toggle flip flop for receiving a fixed time pulse;
a counter electrically coupled to the toggle flip flop, the toggle flip flop enabling the counter for a fixed period of time, the counter receiving the one of the pair of signals, the counter being configured to count a number of pulses from the one of the pair of signals for the time the counter is enabled so as to provide an indication of the frequency of the at least one motor; and
a latch and PISO electrically coupled to the counter for storing and parallel in-serial out register serializing the indication of the frequency of the at least one motor.
2 Assignments
0 Petitions
Accused Products
Abstract
An integrated circuit for controlling a DC motor is disclosed. The integrated circuit includes at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the motor, the DPS being in signal communication with the motor for receiving a pair of signals having a quadrature relationship; and at least one programmable gain amplifier (PGA) electrically coupled to the motor, the PGA being configured to receive a feedback signal indicative of current flowing through the motor and to apply a second signal to the motor for adjusting the speed of the motor; and at least two analog-to-digital converters (A/D), one A/D being used to quantize the output of the PGA for an off-chip processor; and another A/D to provide motor reference position from an analog sensor, such as a potentiometer; and at least two digital-to-analog converters (D/A), one D/A used to set the motor voltage; and another D/A used to set the motor current limit. The integrated circuit can be incorporated into a larger motor control loop which further includes a summing amplifier for providing the feedback signal to the motor that is indicative of current flowing through the motor; a buffer amplifier electrically for sensing the output current of the motor, and a processor for providing control signals to the system monolithic module and for receiving the measurements of speed, position, and direction of the motor.
19 Citations
28 Claims
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1. An integrated circuit for controlling at least one motor comprising:
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at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the at least one motor, the at least one DPS being in signal communication with the at least one motor for receiving a pair of signals having a quadrature relationship; at least one programmable gain amplifier (PGA) electrically coupled to the at least one motor, the PGA being configured to receive a feedback signal indicative of current flowing through the at least one motor and to apply a second signal to the at least one motor for adjusting the speed of the at least one motor; wherein the at least one DPS is configured to measure the speed of the at least one motor based on one of frequency counting and period counting; wherein frequency counting is implemented by counting a number of pulses from the pair of signals having a quadrature relationship that occur within a fixed time window; wherein the circuitry for measuring the speed of the at least one motor based on frequency counting comprises; a toggle flip flop for receiving a fixed time pulse; a counter electrically coupled to the toggle flip flop, the toggle flip flop enabling the counter for a fixed period of time, the counter receiving the one of the pair of signals, the counter being configured to count a number of pulses from the one of the pair of signals for the time the counter is enabled so as to provide an indication of the frequency of the at least one motor; and a latch and PISO electrically coupled to the counter for storing and parallel in-serial out register serializing the indication of the frequency of the at least one motor. - View Dependent Claims (2)
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3. An integrated circuit for controlling at least one motor, comprising:
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at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the at least one motor, the at least one DPS being in signal communication with the at least one motor for receiving a pair of signals having a quadrature relationship; at least one programmable gain amplifier (PGA) electrically coupled to the at least one motor, the PGA being configured to receive a feedback signal indicative of current flowing through the at least one motor and to apply a second signal to the at least one motor for adjusting the speed of the at least one motor; wherein the at least one DPS is configured to measure the speed of the at least one motor based on one of frequency counting and period counting; wherein period counting is implemented by counting a number of pulses from a timer that occur between consecutive pulses from the pair of signals having a quadrature relationship; wherein the circuitry for measuring the speed of the at least one motor based on period counting comprises; a toggle flip flop for receiving one of the pair of signals; a counter electrically coupled to the toggle flip flop, the counter receiving an external clock, the counter being configured to count the number of pulses from the external clock that occur between successive pulses of the one of the pair of signals so as to provide an indication of the time period of the at least one motor; and a latch and PISO electrically coupled to the counter for storing and serializing the indication of the time period of the at least one motor. - View Dependent Claims (4)
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5. An integrated circuit for controlling at least one motor comprising:
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at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the at least one motor, the at least one DPS being in signal communication with the at least one motor for receiving a pair of signals having a quadrature relationship; at least one programmable gain amplifier (PGA) electrically coupled to the at least one motor the PGA being configured to receive a feedback signal indicative of current flowing through the at least one motor and to apply a second signal to the at least one motor for adjusting the speed of the at least one motor; at least one digital-to-analog converter (D/A) configured to set the motor voltage; at least one second digital-to-analog converter (D/A) configured to set a maximum limit on motor current; at least one analog-to-digital converter (A/D) electrically coupled to the at least one PGA for receiving a measurement of the feedback signal of the at least one PGA as an indication of motor current; and at least one second A/D for measuring the initial position of the at least one motor. - View Dependent Claims (6, 7)
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8. A motor control circuit for controlling at least one motor, comprising:
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an integrated circuit, comprising; at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the at least one motor, the DPS being in signal communication with the at least one motor for receiving a pair of signals having a quadrature relationship; at least one programmable gain amplifier (PGA) electrically coupled to the at least one motor, the PGA being configured to receive a feedback signal indicative of current flowing through the at least one motor and to apply a second signal to the at least one motor for adjusting the speed of the at least one motor; at least one summing amplifier electrically coupled to the at least one PGA for providing the feedback signal to the at least one motor that is indicative of current flowing through the at least one motor; at least one buffer amplifier electrically coupled to the at least one motor and to the at least one PGA for sensing the output current of the at least one motor; a processor for providing control signals to the at least one DPS, for providing a control voltage to the at least one summin amplifier and for receiving the measurements of speed position, and location of the at least one motor; wherein the at least one DPS is configured to measure the speed of the at least one motor based on one of frequency counting and period counting; wherein frequency counting is implemented by counting a number of pulses from the pair of signals having a quadrature relationships that occur within a fixed time window; wherein the at least one DPS further comprises circuitry for measuring the speed of the at least one motor based on frequency counting, comprising; a toggle flip flop for receiving a fixed time pulse from the processor; a counter electrically coupled to the toggle flip flop, the toggle flip flop enabling the counter for a fixed period of time, the counter receiving the one of the pair of signals, the counter being configured to count a number of pulses from the one of the pair of signals for the time the counter is enabled so as to provide an indication of the frequency of the at least one motor; and a latch and PISO electrically coupled to the counter for storing and serializing the indication of the frequency of the at least one motor. - View Dependent Claims (9, 10, 11, 12)
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13. A motor control circuit for controlling at least one motor, comprising:
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an integrated circuit, comprising; at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the at least one motor, the DPS being in signal communication with the at least one motor for receiving a pair of signals having a quadrature relationship; at least one programmable gain amplifier (PGA) electrically coupled to the at least one motor, the PGA being configured to receive a feedback signal indicative of current flowing through the at least one motor and to apply a second signal to the at least one motor for adjusting the speed of the at least one motor; at least one summing amplifier electrically coupled to the at least one PGA for providing the feedback signal to the at least one motor that is indicative of current flowing through the at least one motor; at least one buffer amplifier electrically coupled to the at least one motor and to the at least one PGA for sensing the output current of the at least one motor; a processor for providing control signals to the at least one DPS, for providing a control voltage to the at least one summin amplifier and for receiving the measurements of speed position, and location of the at least one motor; and wherein period counting is implemented by counting a number of pulses from a timer that occur between consecutive pulses from the pair of signals having a quadrature relationship. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 27)
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23. A motor control circuit for controlling at least one motor, comprising:
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an integrated circuit, comprising; at least one digital position and speed circuit (DPS) for providing measurements of speed, position, and direction of the at least one motor, the DPS being in signal communication with the at least one motor for receiving a pair of signals having a quadrature relationship; at least one programmable gain amplifier (PGA) electrically coupled to the at least one motor, the PGA being configured to receive a feedback signal indicative of current flowing through the at least one motor and to apply a second signal to the at least one motor for adjusting the speed of the at least one motor; at least one summing amplifier electrically coupled to the at least one PGA for providing the feedback signal to the at least one motor that is indicative of current flowing through the at least one motor; at least one buffer amplifier electrically coupled to the at least one motor and to the at least one PGA for sensing the output current of the at least one motor; a processor for providing control signals to the at least one DPS, for providing a control voltage to the at least one summin amplifier and for receiving the measurements of speed, position, and location of the at least one motor; and wherein the processor updates input voltage to the at least one motor based on the update rule k(m+l)=k(m)−
μ
[ω
(m+l)−
ω
(m)] where k and ω
are the back emf constant and velocity of the at least one motor, where m is the time index for the update rule, and μ
is a user specified update rate. - View Dependent Claims (24, 25, 26, 28)
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Specification