Multi-thickness semiconductor with fully depleted devices and photonic integration

• US 7,847,353 B2
• Filed: 12/05/2008
• Issued: 12/07/2010
• Est. Priority Date: 12/05/2008
• Status: Active Grant

• Current Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Original Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Inventors: Hill, Craig M., Carothers, Daniel N., Pomerene, Andrew T., Vu, Vu A., Conway, Timothy J.
• Primary Examiner(s): Mandala, Victor A
• Application Number:
  US12/328,853
• Publication Number:
  US 20100140708A1
• Time in Patent Office: 732 Days
• Field of Search: 257/347, 257/348, 257/350, 257/351, 257/E27.112
• US Class Current: 257/348
• CPC Class Codes: G02B 6/136 by etching
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.

Claims

1. A semiconductor device, comprising:

a semiconductor wafer substrate defining a thin region and a thick region;

one or more photonic devices formed in the thick region; and

one or more fully depleted electronic devices formed in the thin region.

2. The device of claim 1 further comprising:

an isolation area formed between the thin region and the thick region.

3. The device of claim 1 wherein the substrate has a silicon-on-insulator (SOI) configuration having epitaxial silicon on a thick buried oxide, and each of the one or more fully depleted electronic devices has an epitaxial silicon thickness that is thinner than the epitaxial silicon thickness for each of the one or more photonic devices.

4. The semiconductor device of claim 1 wherein the thick region further includes one or more partially depleted electronic devices.

5. The semiconductor device of claim 4 wherein the one or more fully depleted electronic devices only have lateral p-n junctions, and the one or more partially depleted devices have both lateral and vertical p-n junctions.

6. The semiconductor device of claim 4 wherein the one or more partially depleted electronic devices includes at least one CMOS transistor.

7. The semiconductor device of claim 1 wherein the one or more photonic devices includes at least one ring modulator.

8. The semiconductor device of claim 1 wherein the one or more photonic devices includes at least one waveguide structure.

9. The semiconductor device of claim 8 wherein the at least one waveguide structure includes a ridge waveguide and/or a channel waveguide.

10. The semiconductor device of claim 1 wherein the one or more photonic devices includes at least one photo detector.

11. The semiconductor device of claim 1 wherein the one or more photonic devices includes at least one high index contrast waveguide.

12. The semiconductor device of claim 11 wherein the at least one high index contrast waveguide includes high index contrast silicon waveguides having channel and/or ridge type configurations.

13. The semiconductor device of claim 1 wherein the one or more fully depleted electronic devices includes at least one CMOS transistor.

14. A semiconductor device, comprising:

a semiconductor wafer substrate defining a thin region and a thick region, wherein the substrate includes a silicon-on-insulator (SOI) configuration having epitaxial silicon on a thick buried oxide;

one or more photonic devices formed in the thick region;

one or more fully depleted CMOS devices formed in the thin region; and

an isolation area formed between the thin region and the thick region;

wherein each of the one or more fully depleted CMOS devices has an epitaxial silicon thickness that is thinner than the epitaxial silicon thickness for each of the one or more photonic devices.

15. The semiconductor device of claim 14 wherein the thick region further includes one or more partially depleted CMOS devices.

16. The semiconductor device of claim 15 wherein the one or more fully depleted CMOS devices only have lateral p-n junctions, and the one or more partially depleted CMOS devices have both lateral and vertical p-n junctions.

17. The semiconductor device of claim 14 wherein the one or more photonic devices includes at least one ring modulator and/or a photo detector.

18. The semiconductor device of claim 14 wherein the one or more photonic devices includes a ridge waveguide and/or a channel waveguide.

19. The semiconductor device of claim 14 wherein the one or more photonic devices includes at least one high index contrast waveguide.

20. The semiconductor device of claim 19 wherein the at least one high index contrast waveguide includes high index contrast silicon waveguides having channel and/or ridge type configurations.

21. A semiconductor device, comprising:

a semiconductor wafer substrate defining a thin region and a thick region;

one or more photonic devices formed in the thick region, wherein the one or more photonic devices includes at least one of a ridge waveguide, a channel waveguide, a high index contrast waveguide, and a ring modulator;

one or more fully depleted CMOS devices formed in the thin region; and

an isolation area formed between the thin region and the thick region.