CMOS image sensor readout employing in-pixel transistor current sensing

• US 7,847,846 B1
• Filed: 05/16/2007
• Issued: 12/07/2010
• Est. Priority Date: 05/16/2006
• Status: Active Grant

• Current Assignee: University of Rochester
• Original Assignee: University of Rochester
• Inventors: Bocko, Mark F., Ignjatovic, Zeljko
• Primary Examiner(s): VU, NGOC YEN T
• Application Number:
  US11/749,510
• Time in Patent Office: 1,301 Days
• Field of Search: 348/308
• US Class Current: 348/301
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

In an image sensor, the current through the in-pixel readout transistor is sensed by a circuit that is external to the pixel, and according to the measured current value a feedback current is supplied to charge the read-line parasitic capacitance. The feedback current is supplied by a circuit that also is external to the pixel area. The amplifier structure is reconfigurable so that it can be used both to read out and to reset the pixel.

Claims

1. An active pixel sensor image sensor comprising:

a plurality of sensing elements for a plurality of pixels, the plurality of sensing elements being organized into a plurality of rows;

a row bus for each of the rows of sensing elements;

an in-pixel readout transistor for each of the sensing elements;

a current-sensing circuit for each of the rows, the current-sensing circuit being external to the pixels and connected to the in-pixel readout transistor of each of the pixels in said each of the rows by the row bus, for sensing a current through the in-pixel readout transistor; and

a feedback circuit for each of the rows, external to the pixels, for supplying a feedback to charge a read-line parasitic capacitance of the row bus in accordance with the current sensed by the current-sensing circuit.

2. The image sensor of claim 1, further comprising, for each of the rows, a correlated double sampling circuit for sampling two values on an output of each of the in-pixel readout transistors (one value after the reset phase and one after the integration phase) and taking the difference between the two values.

3. The image sensor of claim 1, wherein each said row bus comprises two row bus lines.

4. The image sensor of claim 3, further comprising a voltage level shifter for each of the rows, the voltage level shifter maintaining a constant voltage difference between the two row bus lines.

5. The image sensor of claim 4, wherein the current-sensing circuit comprises a voltage amplifier having a first input connected to the voltage level shifter.

6. The image sensor of claim 5, wherein an output of the voltage amplifier is connected to a first transistor for sensing the current and to a second transistor for outputting a signal to the feedback circuit representing a level of the feedback which the feedback should output, and wherein an output of the first transistor is fed back to a second input of the voltage amplifier.

7. The image sensor of claim 6, wherein the feedback circuit comprises a current amplifier.

8. The image sensor of claim 1, wherein the readout transistor is in a common-source configuration.

9. The image sensor of claim 1, wherein the current-sensing circuit outputs a signal to the feedback circuit representing a level of the feedback which the feedback should output.

10. The image sensor of claim 9, wherein the signal output by the current-sensing circuit is a current which is proportional to the current sensed by the current-sensing circuit.

11. The image sensor of claim 10, wherein the signal output by the current-sensing circuit is a current which is equal to the current sensed by the current-sensing circuit.

12. The image sensor of claim 10, wherein the signal output by the current-sensing circuit is a current which is scaled from the current sensed by the current-sensing circuit.