Merged field effect transistor cells for switching
First Claim
1. An integrated circuit device comprising:
- a first node;
a second node; and
multiple sets of series connected field effect transistors,wherein each one of said multiple sets comprises;
a first field effect transistor having a first diffusion region electrically connected to said first node; and
a last field effect transistor having a last diffusion region electrically connected to said second node such that said multiple sets are connected in parallel between said first node and said second node, andwherein at least one of said first diffusion region and said last diffusion region of each set of said multiple sets comprises a shared diffusion region with an adjacent set.
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Accused Products
Abstract
Disclosed are embodiments of an improved integrated circuit switching device that incorporates multiple sets of series connected field effect transistors with each set further connected in parallel between two nodes. The sets are arranged in a linear fashion with each set positioned such that it is in contact with and essentially symmetrical relative to an adjacent set. Arranging the sets in this manner allows adjacent diffusion regions of the same type (i.e., sources or drains) from adjacent sets to be merged. Merging of the diffusion regions provides several benefits, including but not limited to, reducing the device size, reducing the amount of required wiring for the device (i.e., reducing resistance) and reducing side capacitance between the now merged diffusion regions and the substrate. Also disclosed are embodiments of an associated design structure for the device and an associated method of forming the device.
11 Citations
20 Claims
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1. An integrated circuit device comprising:
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a first node; a second node; and multiple sets of series connected field effect transistors, wherein each one of said multiple sets comprises; a first field effect transistor having a first diffusion region electrically connected to said first node; and a last field effect transistor having a last diffusion region electrically connected to said second node such that said multiple sets are connected in parallel between said first node and said second node, and wherein at least one of said first diffusion region and said last diffusion region of each set of said multiple sets comprises a shared diffusion region with an adjacent set. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of forming an integrated circuit device comprising:
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providing a wafer; forming on said wafer multiple sets of series connected field effect transistors such that each set comprises a first field effect transistor having a first diffusion region and a last field effect transistor having a last diffusion region and further such that at least one of said first diffusion region and said last diffusion region of each of said multiple sets comprises a shared diffusion region with an adjacent set; and electrically connecting said multiple sets in parallel between a first node and a second node by electrically connecting said first diffusion region of each of said multiple sets to said first node and said last diffusion region of each of said multiple sets to said second node. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A design structure embodied in a machine readable medium, said design structure comprising an integrated circuit device, said integrated circuit device comprising:
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a first node; a second node; and multiple sets of series connected field effect transistors, wherein each one of said multiple sets comprises; a first field effect transistor having a first diffusion region electrically connected to said first node; and a last field effect transistor having a last diffusion region electrically connected to said second node such that said multiple sets are connected in parallel between said first node and said second node, and wherein at least one of said first diffusion region and said last diffusion region of each set of said multiple sets comprises a shared diffusion region with an adjacent set. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification