Primary side control circuit and method for ultra-low idle power operation

• US 7,908,498 B2
• Filed: 07/12/2010
• Issued: 03/15/2011
• Est. Priority Date: 05/29/2008
• Status: Expired due to Fees

• Current Assignee: iGo, Inc.
• Original Assignee: iGo, Inc.
• Inventors: DuBose, Richard G.
• Primary Examiner(s): Patel, Nitin C
• Application Number:
  US12/834,595
• Publication Number:
  US 20100332865A1
• Time in Patent Office: 246 Days
• Field of Search: 713/300, 713/320, 713/323, 323/271, 323/317
• US Class Current: 713/300
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/33523 with galvanic isolation between input and output of both the power stage and the feedback loop

Abstract

A method and circuit for reducing power consumption during idle mode to ultra-low levels, such as about 1/10^th to 1/1000^th or less of active power is disclosed. An ultra-low idle power supply comprises a primary circuit, a secondary circuit and a control circuit. The control circuit monitors behavior of the primary circuit and determines whether an idle state or no load condition exists, and if so the primary circuit is disengaged. By disengaging the primary circuit, the power consumption of the ultra-low idle power supply is reduced to ultra-low levels.

Claims

1. A primary side circuit configured to facilitate an ultra-low idle power mode in a power supply, said primary side circuit comprising:

a modulator configured for modulating input power at a high frequency rate to transfer power from a primary side of a transformer to a secondary side of the transformer; and

wherein said primary side circuit is in communication with a control circuit on a primary side of said power supply, and wherein said control circuit is configured to monitor at least one of a duty cycle or a switching rate of said modulator and to control said primary side circuit such that said primary side circuit is substantially disabled in response to said control circuit determining that substantially no load exists.

2. The primary side circuit of claim 1, wherein said control circuit comprises a logic control unit configured for monitoring said modulator and a power control unit configured for control of said primary side circuit.

3. The primary side circuit of claim 2, whereby said power control unit disables said modulator by opening at least one switch device coupled between said power control unit and said modulator.

4. The primary side circuit of claim 1, wherein said modulator comprises a PWM controller.

5. The primary side circuit of claim 2, wherein said logic control unit comprises at least one input coupled to said modulator to monitor said at least one of said duty cycle or said switching rate of said modulator.

6. The primary side circuit of claim 5, wherein said at least one input coupled to said modulator monitors at least one of an output pulse rate directly from a PWM controller within said modulator, an output from an integrator coupled to said PWM controller, and an output from a current-to-voltage converter coupled to said PWM controller.

7. A method for facilitating ultra-low power consumption in a power supply comprising:

monitoring, using a control circuit in communication with a primary circuit on a primary side of a power supply, at least one of a duty cycle or a switching rate of said primary circuit of said power supply and determining if a substantially no load condition exists; and

substantially disabling, using said control circuit, said primary circuit of said power supply in response to said substantially no load condition being detected.

8. The method according to claim 7, said method further comprising enabling said power supply in response to said control circuit determining a power load exists.

9. The method of claim 8, wherein said enabling said power supply occurs in response to at least one of a duty cycle or a switching rate of said primary circuit increasing above a threshold level.

10. The method of claim 7, wherein said monitoring comprises having said control circuit monitor the activity of a modulator to determine whether said substantially no load condition exists.

11. The method of claim 10, wherein said control circuit monitors at least one of an output pulse rate or a duty cycle directly from a PWM controller within said modulator.

12. The method of claim 10, wherein said control circuit monitors an output from a current-to-voltage converter coupled to a PWM controller within said modulator or an output from an integrator coupled to the PWM controller.

13. The method of claim 7, wherein said power supply is substantially disabled for an indeterminate period of time.

14. A circuit for use in a power converter to facilitate ultra-low power consumption during an idle mode, said circuit comprising:

a control circuit configured to monitor at least one of a duty cycle or a switching rate within a primary circuit of the power converter to detect the idle power mode, wherein said control circuit controls the primary circuit such that the primary circuit is substantially disabled in response to the detection of the idle power mode.

15. The circuit of claim 14, wherein said control circuit comprises a power control unit configured for control of the primary circuit.

16. The circuit of claim 15, whereby said power control unit disables a modulator of the primary circuit by opening at least one switch device coupled between said power control unit and the modulator.