Systems and methods for presenting electronic communication packets using a logic analyzer

• US 7,911,970 B2
• Filed: 02/02/2009
• Issued: 03/22/2011
• Est. Priority Date: 02/02/2009
• Status: Active Grant

• Current Assignee: Timothy J. Harvey
• Original Assignee: Timothy J. Harvey
• Inventors: Harvey, Timothy J.
• Primary Examiner(s): Ngo; Ricky
• Assistant Examiner(s): Zaidi; Iqbal
• Application Number:
  US12/322,409
• Publication Number:
  US 20100195512A1
• Time in Patent Office: 778 Days
• Field of Search: 370/352, 370/252, 370/230, 370/503, 370/241, 709/224
• US Class Current: 370/252
• CPC Class Codes: H04L 41/0631 using root cause analysis; using analysis of correlation between notifications, alarms or events based on decision criteria, e.g. hierarchy, tree or time analysis
• CPC Class Codes: H04L 41/22 comprising specially adapted graphical user interfaces [GUI]
• CPC Class Codes: H04L 43/045 for graphical visualisation of monitoring data
• CPC Class Codes: H04L 43/50 Testing arrangements

Abstract

A method for presenting data via a display on a first computing device according to a user-selected format is described. One of a plurality of data format structures is selected. The structure comprises one or more predetermined data segments according to the selected format. A bus data stream comprising a plurality of data segments is received from a second device. The plurality of data segments being in one of a plurality of possible predetermined formats. The plurality of data segments is decoded in one or more data structures according to the selected format. The contents of the one or more data structures are displayed on a screen. A user analyzes the displayed contents and determines whether to execute debugging operations for the second device according to the contents of the displayed data structures.

Claims

1. A method for presenting data via a display on a first computing device according to a user-selected format, comprising:

selecting, by a user, one of a plurality of data format structures, wherein the data structure comprises one or more predetermined data segments according to the selected data format structure, wherein the selected data format structure is associated with a protocol for an embedded communications bus;

receiving a bus data stream on the embedded communications bus, the bus data stream comprising a plurality of data segments from a second device, the plurality of data segments being in one of a plurality of possible predetermined formats;

accessing one of a plurality of protocol files corresponding to the protocol for the embedded communications bus;

decoding the plurality of data segments in one or more data structures according to the protocol file associated with the selected data format structure; and

displaying on a screen the contents of the one or more data structures, whereby the user analyzes the displayed contents and determines whether to execute debugging operations for the second device according to the contents of the displayed data structures.

2. The method of claim 1, wherein the displayed structures are displayed in a graphical format.

3. The method of claim 1, wherein the data structures comprise electronic communication packets.

4. The method of claim 1, wherein the user-selected format comprises a user-defined file that comprises a text file.

5. The method of claim 1, further comprising capturing traces of the encoded bus data stream to generate a voltage versus time waveform.

6. The method of claim 1, further comprising displaying a voltage versus time waveform and the decoded plurality of data segments on the screen.

7. The method of claim 1, wherein the user-selected format comprises instructions to combine a voltage versus time waveform, the decoded data segments, and the communication packets in a single display.

8. The method of claim 1, wherein the protocol for an embedded communication bus comprises the protocol for a controller-area network (CAN) bus, a Universal Serial Bus (USB), a 12C bus, an Async bus, a parallel bus, a 1-wire bus, a Serial Peripheral Interface (SPI) bus, a system management (SM) bus, or a serial bus.

9. A testing device that is configured to present data via a display according to a user-selected format, the testing device comprising:

a processor;

memory in electronic communication with the processor; and

a logic analyzer module configured to;

receive a user'"'"'s selection of one of a plurality of data format structures, wherein the data structure comprises one or more predetermined data segments according to the selected data format structure, wherein the selected data format structure is associated with a protocol for an embedded communications bus;

receive a bus data stream on the embedded communications bus, the bus data stream comprising a plurality of data segments from a second device, the plurality of data segments being in one of a plurality of possible predetermined formats;

access one of a plurality of protocol files corresponding to the protocol for the embedded communications bus;

decode the plurality of data segments in one or more data structures according to the protocol file associated with the selected data format structure; and

display on a screen the contents of the one or more data structures, whereby a user analyzes the displayed contents and determines whether to execute debugging operations for the second device according to the contents of the displayed data structures.

10. The testing device of claim 9, wherein the logic analyzer module is further configured to provide the data structures to the display to be displayed in a graphical format.

11. The testing device of claim 9, wherein the data structures comprise electronic communication packets.

12. The testing device of claim 9, wherein the user-selected format comprises a user-defined file that comprises a text file.

13. The testing device of claim 9, wherein the logic analyzer module is further configured to capture traces of the encoded bus data stream to generate a voltage versus time waveform.

14. The testing device of claim 9, wherein the logic analyzer module is further configured to provide a voltage versus time waveform and the decoded plurality of data segments to the display.

15. The testing device of claim 9, wherein the user-selected format comprises instructions to combine a voltage versus time waveform, the decoded data segments, and the communication packets in a single display.

16. The testing device of claim 9, wherein the protocol for an embedded communication bus comprises the protocol for a controller-area network (CAN) bus, a Universal Serial Bus (USB), a 12C bus, an Async bus, a parallel bus, a 1-wire bus, a Serial Peripheral Interface (SPI) bus, a system management (SM) bus, or a serial bus.

17. A non-transitory computer-readable medium comprising executable instructions for:

selecting, by a user, one of a plurality of data format structures, wherein the data structure comprises one or more predetermined data segments according to the selected data format structure, wherein the selected data format structure is associated with a protocol for an embedded communications bus;

receiving a bus data stream on the embedded communications bus, the bus data stream comprising a plurality of data segments from a second device, the plurality of data segments being in one of a plurality of possible predetermined formats;

accessing one of a plurality of protocol files corresponding to the protocol for the embedded communications bus;

decoding the plurality of data segments in one or more data structures according to the protocol file associated with the selected data format structure; and

displaying on a screen the contents of the one or more data structures, whereby the user analyzes the displayed contents and determines whether to execute debugging operations for the second device according to the contents of the displayed data structures.

18. The non-transitory computer-readable medium of claim 17, wherein the displayed structures are displayed in a graphical format.