System and method of reporting error codes in an electronically controlled device
First Claim
Patent Images
1. A method of reporting errors in an electronically controlled device, comprising:
- generating a first bit field representative of a severity of an internal error;
generating a second bit field representative of a location of the internal error, including generating a plurality of component bit fields corresponding to at least one of a component, module, or index, wherein the plurality of component bit fields comprises a component bit field corresponding to the component, wherein the component bit field includes a number selected to identify the component by the lowest level of a hierarchical component topology;
generating a third bit field representative of a cause of the internal error;
structuring an internal error code, wherein the internal error code includes the first, second and third bit fields;
mapping the internal error code to a corresponding external error code;
wherein the internal error code and the external error code each include a bit field that identifies an error code as being one of the internal error code or the external error code.
1 Assignment
0 Petitions
Accused Products
Abstract
A method of reporting errors in an electronically controlled device, comprises generating a first bit field representative of a severity of an internal error, generating a second bit field representative of a location of the internal error; and generating a third bit field representative of a cause of the internal error. The method also comprises structuring an internal error code, wherein the internal error code includes the first, second, and third bit fields.
49 Citations
28 Claims
-
1. A method of reporting errors in an electronically controlled device, comprising:
-
generating a first bit field representative of a severity of an internal error; generating a second bit field representative of a location of the internal error, including generating a plurality of component bit fields corresponding to at least one of a component, module, or index, wherein the plurality of component bit fields comprises a component bit field corresponding to the component, wherein the component bit field includes a number selected to identify the component by the lowest level of a hierarchical component topology; generating a third bit field representative of a cause of the internal error; structuring an internal error code, wherein the internal error code includes the first, second and third bit fields; mapping the internal error code to a corresponding external error code; wherein the internal error code and the external error code each include a bit field that identifies an error code as being one of the internal error code or the external error code. - View Dependent Claims (2, 3, 4, 5)
-
-
6. A method of operating an electronically controlled device, comprising:
-
operating a first sub-system, wherein the first sub-system comprises a first controller; diagnosing an internal error occurring within the first sub-system; generating an internal error code, wherein the internal error code includes bit fields representative of a first set of information corresponding to the internal error including identifying a component having the internal error by the lowest level of a hierarchical component topology; mapping the internal error code to a corresponding external error code, wherein the external error code includes bit fields representative of a second set of information corresponding to the internal error; logging the internal error code in memory within the first sub-system; communicating the external error code to a second sub-system, wherein the second sub-system comprises a master controller for the first and second sub-systems; logging the external error code in memory within the first sub-system; wherein the first set of information includes at least some information which is not included in the second set of information. - View Dependent Claims (7, 8, 9, 10)
-
-
11. A method of reporting errors in an electronically controlled device, comprising:
-
diagnosing an internal error; generating an internal error code, wherein the internal error code represents information relating to a severity and a location of the error and an error identifier, including generating a plurality of component bit fields corresponding to at least one of a component, module, or index, wherein the plurality of component bit fields comprises a component bit field corresponding to the component, wherein the component bit field includes a number selected to identify the component by the lowest level of a hierarchical component topology; generating an external error code, wherein the external error code represents information relating to the severity of the internal error, to the location of the internal error and to a user action responsive to the internal error, wherein generating the user error code comprises selecting the user action from a pre-programmed list of user actions, wherein the error identifiers in the list of error identifiers have been mapped to corresponding user actions in the list of user actions; the internal error code and the external error code each including a bit field that identifies an error code as being one of the internal error code or the external error code; logging the internal error code in an internal error code history; and providing a visual representation of the user action.
-
-
12. An imaging device, comprising:
a general imaging application sub-system, wherein the imaging application sub-system comprises a controller for controlling the imaging application sub-system, sensors for sensing conditions indicative of a plurality of internal errors, and memory, wherein the memory includes software instructions for diagnosing the plurality of internal errors and includes software instructions for generating an internal error code corresponding to an internal error and for generating an external error code responsive to the internal error, wherein the internal error code identifies a component having the internal error by the lowest level of a hierarchical component topology, wherein the internal error code and the external error code each include a bit field identifying an error code as being one of the internal error code or the external error code; and
wherein the instructions for generating the external error code include mapping the internal error code to a suggested recovery action.- View Dependent Claims (13)
-
14. An electronically controlled device, comprising:
-
a first sub-system including a memory; a first controller for controlling the first sub-system; a diagnostics unit for detecting internal errors in the first sub-system and generating an internal error code responsive to a detected internal error, wherein the internal error code identifies a component having the internal error by the lowest level of a hierarchical component topology, and, wherein the first controller maps the internal error code to a corresponding external error code; and a communications output arranged for communicating the external error code to a second sub-system; wherein the internal error code and the external error code are logged in the memory of the first sub-system. - View Dependent Claims (15, 16, 17, 18)
-
-
19. An electronically controlled device, comprising:
-
a first sub-system, wherein the first sub-system comprises a first controller; a computer readable medium comprising instructions for diagnosing an internal error occurring within the first sub-system, comprising instructions for generating an internal error code corresponding to the internal error, wherein the internal error code includes bit fields representative of a first set of information corresponding to the internal error, wherein the internal error code identifies a component having the internal error by the lowest level of a hierarchical component topology, and comprising instructions for mapping the internal error code to a corresponding external error code, wherein the external error code includes bit fields representative of a second set of information corresponding to the internal error, wherein the first set of information includes at least some information which is not included in the second set of information, and wherein the internal error code and the external error code each include a bit field that identifies an error code as being one of the internal error code or the external error code. - View Dependent Claims (20, 21, 22, 23, 24, 25)
-
-
26. A method of operating an electronically controlled device, comprising:
-
handling and managing errors, wherein handling and managing errors comprises detecting errors in a first sub-system, generating internal error codes corresponding to the errors including identifying a components having the internal errors by the lowest level of a hierarchical component topology, and mapping the internal error codes to corresponding external error codes, diagnosing and troubleshooting the errors, wherein diagnosing and troubleshooting comprises arranging the first sub-system to automatically take action responsive to some of the errors; controlling the system state of at least the first sub-system responsive to the internal error code; logging the internal error codes and the external error codes in an error code history log in a memory of the first sub-system; controlling the electronically controlled device, wherein controlling the electronically controlled device comprises having a master controller in a second sub-system periodically poll the first sub-system and having the master controller take appropriate action responsive to an external error code provided by the first sub-system. - View Dependent Claims (27)
-
-
28. A processor-readable medium having processor-executable instructions therein which, when executed by a processor, cause the processor to:
-
generate a first bit field representative of a severity of an internal error; generate a second bit field representative of a location of the internal error, including generating a plurality of component bit fields corresponding to at least one of a component, module, or index, wherein the plurality of component bit fields comprises a component bit field corresponding to the component, wherein the component bit field includes a number selected to identify the component by the lowest level of a hierarchical component topology; generate a third bit field representative of a cause of the internal error; structure an internal error code, wherein the internal error code includes the first, second and third bit fields; map the internal error code to a corresponding external error code, wherein the external error code includes a fourth bit field representative of a recovery action to be taken responsive to the internal error; and wherein the internal error code and the external error code each include a fifth bit field that identifies an error code as being one of the internal error code or the external error code.
-
Specification