Power detector of embedded IC test circuits

• US 7,925,229 B2
• Filed: 04/25/2008
• Issued: 04/12/2011
• Est. Priority Date: 03/24/2005
• Status: Expired due to Fees

• Current Assignee: University of Florida Research Foundation, Incorporated (State University System of Florida)
• Original Assignee: University of Florida Research Foundation, Incorporated (State University System of Florida)
• Inventors: Zhang, Tao, Eisenstadt, William R., Yoon, Jang Sup, Fox, Robert M.
• Primary Examiner(s): Jackson; Blane J
• Application Number:
  US12/109,915
• Publication Number:
  US 20090005103A1
• Time in Patent Office: 1,082 Days
• Field of Search: 455/67.11, 455/522, 455/73, 455/115.1, 455/127.1, 324/76.11, 324/95, 324/123.R, 324/132
• US Class Current: 455/127.1
• CPC Class Codes: H03F 2200/105 A non-specified detector of the power of a signal being used in an amplifying circuit
• CPC Class Codes: H03F 2203/5031 the source circuit of the follower being a current source
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/50 Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H04B 17/19 Self-testing arrangements
• CPC Class Codes: H04B 17/318 Received signal strength
• CPC Class Codes: H04B 2001/0408 with power amplifiers

Abstract

A self-testing transceiver having an on-chip power detection capability is provided. The self-testing transceiver can include a semiconductor substrate and a transmitter having a high-power amplifier disposed on the substrate. The self-testing transceiver also can include a receiver disposed on the substrate for selectively coupling to an antenna. The self-testing transceiver can further include at least one power detector disposed on the semiconductor substrate for determining a power such as an RMS and/or peak-power of a signal at an internal node of the self-testing transceiver. Additionally, the self-testing transceiver can include a loopback circuit disposed on the substrate.

Claims

1. A power detector, comprising:

an initial-stage attenuator for attenuating a received signal, said initial-stage attenuator having a signal input and a signal output;

a final-stage attenuator electrically connected to said initial-stage attenuator for also attenuating the received signal, said final-stage attenuator having a signal input and a signal output;

at least one intermediate-stage attenuator connected in series between said initial-stage attenuator and said final-stage attenuator for also attenuating the received signal;

an initial-stage detection unit connected to said signal input of said initial-stage attenuator for providing a first power measurement;

an intermediate-stage detection unit connected to said signal output of said initial-stage attenuator for providing a second power measurement;

at least one additional intermediate-stage detection unit connected to said signal input of said final-stage attenuator for providing a third power measurement;

a final-stage detection unit connected to said signal output of said final-stage attenuator; and

a determining module connected to each of said detection units for determining a power measurement of the received signal.

2. The power detector of claim 1, wherein the power determining module determines the power measurement by selecting one of a ratio of the second power measurement to the first power measurement, a ratio of the third power measurement to the second power measurement, and a ratio of the fourth power measurement to the third power measurement.

3. The power detector of claim 1, further comprising a reference unit connected to each of said detection units for providing a reference voltage.

4. The power detector of claim 1, wherein each of said initial detection unit, intermediate detection unit, at least one additional detection unit, and final detection unit comprises a bipolar junction transistor (BJT) detection unit that comprises a bipolar junction transistor having a base, emitter, and collector regions.

5. The power detector of claim 4, wherein each BJT detection unit comprises a signal input electrically connected at said base region, and a signal output electrically connected to said emitter region.

6. The power detector of claim 5, further comprising a resistor connected between said collector region and said base region, and a capacitor connected between said collector region and said signal output.

7. The power detector of claim 1, wherein said initial-stage, intermediate-stage, additional intermediate-stage, and final-stage attenuators each comprise −

8 dB attenuators.

8. The power detector of claim 1, wherein the initial-stage attenuator comprises a π

-type attenuator.

9. The power detector of claim 1, wherein the final-stage attenuator comprises an L-type terminator.