Transmit driver in communication system

• US 7,925,955 B2
• Filed: 03/09/2006
• Issued: 04/12/2011
• Est. Priority Date: 03/10/2005
• Status: Expired due to Fees

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Shah, Devarshi, Dahl, Sten Jorgen, Younkin, Kenton A.
• Primary Examiner(s): Lamarre; Guy J
• Application Number:
  US11/373,606
• Publication Number:
  US 20060218472A1
• Time in Patent Office: 1,860 Days
• Field of Search: 714/755, 714785-786, 714/781, 714/758
• US Class Current: 714/755
• CPC Class Codes: H04L 1/0043 Realisations of complexity reduction techniques, e.g. use of look-up tables
• CPC Class Codes: H04L 1/0066 Parallel concatenated codes
• CPC Class Codes: H04L 1/0083 Formatting with frames or packets; Protocol or part of protocol for error control
• CPC Class Codes: H04L 2001/0093 Point-to-multipoint

Abstract

Embodiments describe a transmit driver that processes data communication between a scheduler and a turbo encoder. Transmit driver receives a request for a super frame and ascertains whether it has enough information to start the super frame. If there is enough data, the super frame is written to an appropriate hardware register. Both Direct Memory Access (DMA) and non-DMA hardware can be supported with the one or more embodiments.

Claims

1. A method for data transmission, the method comprising:

maintaining a sorted list of turbo groups, wherein a turbo group includes four turbo packets, and a logical channel that includes at least sixteen turbo packets divided into four turbo groups;

receiving, at a transmit driver, a request from an encoder for a super frame to be encoded for over the air transmission by a transmitter that is coupled to the encoder;

ascertaining if enough data to process the super frame is available by analyzing the sorted list of turbo groups; and

in response to receiving the request for the super frame to be encoded for over the air transmission and in response to ascertaining that there is enough data available to process the super frame, sending the super frame to the encoder, wherein the super frame is encoded by the encoder prior to transmission.

2. The method of claim 1, wherein an encoded super frame output of the encoder is transmitted over the air by the transmitter.

3. The method of claim 1, further comprising:

receiving an interrupt from a non-direct memory access hardware component if a buffer is available;

selecting a next turbo group of the logical channel from the sorted list of turbo groups; and

transferring the next turbo group for a frame.

4. The method of claim 1, further comprising:

receiving an interrupt from a direct memory access hardware component, the interrupt indicating that the logical channel has been consumed;

selecting a next turbo group of the logical channel from the sorted list of turbo groups; and

initiating a direct memory access transfer.

5. The method of claim 4, further comprising copying the turbo groups in a temporary buffer.

6. An apparatus, for data transmission, the apparatus comprising:

a receiver that receives a request for a super frame to be encoded for over the air transmission;

a storage medium that maintains a list of turbo groups;

an analyzer that analyzes the list of turbo groups to determine if data to begin the super frame is available based on the received request; and

a writer that writes the super frame to a hardware register if the data to begin the super frame is available to be encoded and transmitted over the air by a transmitter.

7. The apparatus of claim 6, further comprising:

the receiver receives a function call from a scheduler; and

a written super frame is output by a turbo encoder for over the air transmission, and wherein the hardware register that receives the super frame from the writer is within the turbo encoder.

8. The apparatus of claim 7, the function call is one of an open sequence, a close sequence, a super frame send, and a diagnostic sequence.

9. The apparatus of claim 6, wherein the receiver further receives from a direct memory access hardware component an interrupt indicating that the logical channel has been processed.

10. The apparatus of claim 9, further comprising:

the analyzer selects a next logical channel from the list of turbo groups; and

the writer processes a direct memory access transfer to the direct memory access hardware component.

11. The apparatus of claim 6, wherein the receiver further receives from a non-direct memory access hardware component an interrupt if a buffer is available.

12. The apparatus of claim 11, wherein the analyzer selects a next logical channel from the list of turbo groups and the writer sends a next turbo group for a frame to the non-direct memory access hardware component.

13. A computer readable storage medium containing executable instructions, which, when executed by a processor, cause the processor to:

receive a request for a super frame to be encoded for over the air transmission;

maintain a list of turbo groups;

analyze the list of turbo groups to determine if data is available to begin the super frame based on the received request; and

write the super frame to a hardware register if the data to begin the super frame is available to be encoded and transmitted over the air by a transmitter.

14. The computer readable storage medium of claim 13, further containing executable instructions to:

receive a function call to perform one of an open sequence, a diagnostic sequence, a super frame send sequence, and a close sequence; and

process the function call to control a hardware component.

15. The computer readable storage medium of claim 14, further containing executable instructions to:

receive an interrupt; and

selectively process the interrupt whether the hardware component is a direct memory access hardware component or a non-direct memory access hardware component.

16. The computer readable storage medium of claim 15, further containing executable instructions to:

selectively process the interrupt if the hardware component is a direct memory access hardware component;

select a next logical channel from the list of turbo groups; and

transmitting a direct memory access transfer to the direct memory access hardware component.

17. The computer readable storage medium of claim 15, further containing executable instructions to:

selectively process the interrupt if the hardware component is a non-direct memory access hardware component;

select a next logical channel from the list of turbo groups; and

transmit the next logical channel.

18. An apparatus for communicating data, the apparatus comprising:

means for maintaining a list of turbo groups;

means for receiving a request to transmit a super frame;

means for reviewing the list of turbo groups to determine if data to transmit the super frame is available to complete the request; and

means for providing the super frame to at least one register if the data is available to complete the request, wherein the super frame is provided to the at least one register to be encoded and transmitted over the air by a transmitter.

19. The apparatus of claim 18, further comprising:

means for analyzing the list of turbo groups for a plurality of logical channels; and

means for writing the plurality of logical channels and associated control information to a hardware component.

20. A processor readable medium containing processor executable instructions that are operative to cause a processor to:

sort a listing of turbo groups, wherein a turbo group includes four turbo packets and a logical channel that includes at least four turbo groups;

store the sorted list of turbo groups;

receive a request to output a super frame to be encoded for over the air transmission;

determine if enough data to process the super frame is available by analyzing data of the sorted list of turbo groups; and

output the super frame to be encoded and transmitted over the air by a transmitter if enough data to process the super frame is available.