Baseband signal input current splitter

• US 7,949,367 B2
• Filed: 11/24/2009
• Issued: 05/24/2011
• Est. Priority Date: 02/07/2003
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: ST-Ericcson SA (Telefonaktiebolaget LM Ericsson)
• Inventors: Locher, Matthias, Daanen, Anton, Charlon, Olivier
• Primary Examiner(s): Urban; Edward
• Assistant Examiner(s): HU, RUI MENG
• Application Number:
  US12/625,388
• Publication Number:
  US 20100069024A1
• Time in Patent Office: 546 Days
• Field of Search: 455/550.1, 455/551, 455/552.1, 455/553.1, 455/118, 455/103, 455/105, 455/102, 455/127.1
• US Class Current: 455/552.1
• CPC Class Codes: H04B 1/005 adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
• CPC Class Codes: H04B 1/0483 Transmitters with multiple parallel paths
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes

Abstract

A current steering mechanism is provided in a radio transmitter (e.g., a multiband radio transmitter) to provide compatibility with a variety of baseband parts. Different proportions of an input signal current (“in”) are steered to a dummy load, a mixer for a first band, and at least one other mixer for a second band. The mechanism is structured to selectively apportion a current input signal between multiple paths of the same polarity having respective load circuits and concurrently steer different proportions of the current input signal to a dummy load path and at least one mixer path.

Claims

1. A circuit, comprising:

a current splitter structured to receive a current input signal received at a radio circuit from a baseband circuit and to apportion different proportions of the current input signal concurrently between multiple paths of the same polarity having respective load circuits, the multiple paths including at least one multiple mixer path and a dummy load circuit, and a voltage-to-current converter structured to convert a voltage input signal to the current input signal.

2. The circuit of claim 1 wherein the current splitter comprises multiple proportioning units controlled by a control logic circuit.

3. The circuit of claim 1 wherein the current splitter comprises:

a plurality of input nodes, each input node adapted to receive a phase of the current input signal; and

a plurality of proportioning units coupled to each input node and to a control logic circuit and structured to control the proportioning units to steer selected proportions of the phase of the current input signal to the dummy load path.

4. The circuit of claim 3 wherein the plurality of proportioning units comprises a plurality of transistors, each transistor having a first conducting terminal coupled to the input node, a second conducting terminal coupled to a load circuit, and a control terminal coupled to the control logic circuit.

5. The circuit of claim 4 wherein the plurality of transistors each have a same width/length size.

6. A circuit, comprising:

a current splitter structured to selectively apportion different proportions of a current input signal between multiple paths of the same polarity having respective load circuits that include a dummy load path and at least one mixer path.

7. The circuit of claim 6 wherein the current splitter comprises multiple proportioning units structured to be controlled by a control logic circuit.

8. The circuit of claim 6 wherein the current splitter comprises:

a plurality of input nodes, each input node structured to receive a phase of the current input signal; and

a plurality of proportioning units coupled to each input node and to a control logic circuit that controls the proportioning units to steer selected proportions of the phase of the current input signal to the dummy load path.

9. The circuit of claim 8 wherein the plurality of proportioning units comprises a plurality of transistors, each transistor having a first conducting terminal coupled to the input node, a second conducting terminal coupled to a load circuit, and a control terminal coupled to the control logic circuit.

10. The circuit of claim 9 wherein the plurality of transistors each have a same width/length size.

11. A circuit for interfacing a baseband portion and a radio portion of a radio transmitter, comprising:

a current steering circuit structured to perform the following method;

receiving at the radio portion a current signal from the baseband portion; and

selectively apportioning different proportions of the current signal between multiple paths of the same polarity having respective load circuits that include at least one multiple mixer path and a dummy load.

12. The circuit of claim 11 wherein the multiple mixer paths and the dummy load path have input impedances such that for each such impedance a voltage drop across that impedance is not greater than a predetermined maximum.

13. The circuit of claim 11 wherein the radio transmitter is a multiband radio transmitter, and the multiple mixer paths include a highband path and a lowband path.

14. The circuit of claim 11 wherein the multiple mixer paths include first and second paths coupled to a single mixer, the first path providing little or no signal amplification and the second path providing signal amplification of at least several decibels.

15. The circuit of claim 11 wherein a portion of the current signal apportioned to the dummy load path is controlled according to discrete values within a predetermined range.

16. The circuit of claim 15 wherein the discrete values are separated by approximately one decibel.

17. The circuit of claim 15 wherein the predetermined range includes apportioning substantially all of the current signal to the dummy load path.

18. The circuit of claim 11 wherein the radio transmitter is a multiband radio transmitter, and the multiple mixer paths include first and second highband paths and first and second lowband paths.

19. The circuit of claim 18 wherein the first and second highband paths are coupled to a single mixer, the first highband path providing little or no signal amplification and the second highband path providing signal amplification of at least several decibels.

20. The circuit of claim 18 wherein the first and second lowband paths are coupled to a single mixer, the first lowband path providing little or no signal amplification and the second lowband path providing signal amplification of at least several decibels.